mc68hc908ap8a Freescale Semiconductor, Inc, mc68hc908ap8a Datasheet - Page 144

• Manufacturer Part Number: mc68hc908ap8a
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Timer Interface Module (TIM)
TOVx — Toggle On Overflow Bit
CHxMAX — Channel x Maximum Duty Cycle Bit
144
When channel x is an output compare channel, this read/write bit controls the behavior of the channel
x output when the TIM counter overflows. When channel x is an input capture channel, TOVx has no
effect.
Reset clears the TOVx bit.
When the TOVx bit is at logic 1, setting the CHxMAX bit forces the duty cycle of buffered and
unbuffered PWM signals to 100%. As
after it is set or cleared. The output stays at the 100% duty cycle level until the cycle after CHxMAX is
cleared.
1 = Channel x pin toggles on TIM counter overflow
0 = Channel x pin does not toggle on TIM counter overflow
After initially enabling a TIM channel register for input capture operation,
and selecting the edge sensitivity, clear CHxF to ignore any erroneous
detection flags.
When TOVx is set, a TIM counter overflow takes precedence over a
channel x output compare if both occur at the same time.
MSxB:MSxA
X0
X1
1X
1X
1X
00
00
00
01
01
01
01
Table 9-3. Mode, Edge, and Level Selection
ELSxB:ELSxA
MC68HC908AP A-Family Data Sheet, Rev. 3
00
00
01
10
11
00
01
10
11
01
10
11
Figure 9-11
Output compare
Buffered output
buffered PWM
Output preset
Input capture
compare or
NOTE
NOTE
or PWM
Mode
shows, the CHxMAX bit takes effect in the cycle
Capture on falling edge only
Capture on rising edge only
Toggle output on compare
Toggle output on compare
Clear output on compare
Clear output on compare
Software compare only
Set output on compare
Set output on compare
Pin under port control;
Pin under port control;
initial output level high
initial output level low
Capture on rising or
Configuration
falling edge
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