pnx1500 NXP Semiconductors, pnx1500 Datasheet - Page 88

• Manufacturer Part Number: pnx1500
• Description: Pnx15xx Series Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
PNX15XX_SER_3
Product data sheet
3.3 Clock System
3.4 Power Management
The scripted boot, in combination with an appropriately programmed I
allows the PNX15xx Series to boot in many ways.
A stand-alone PNX15xx Series system is able to reliably update its own Flash boot
image, whether the Flash is standard or nand Flash. In most systems this is done by
extra Flash storage capacity that is used by the Flash update software to guarantee
atomicity of a boot image update under power failure. The update either succeeds or
the old boot image is retained. In some systems, however, it may be cost attractive to
use a medium size boot I
code to recover a corrupted Flash from some system resource such as a network or
disk drive.
In the presence of an external host processor boot is very different. PNX15xx Series
must execute an I
personality data. Once this data is obtained, PNX15xx Series is ready to follow the
standardized PCI enumeration and configuration protocol executed by the host. In
external host configurations a single small I
memory is needed. The host is responsible for configuring a list of PNX15xx Series
internal registers, loading an application software image into PNX15xx Series DRAM
and starting the TM3260.
PNX15xx Series provides a low cost, highly programmable clock system. All the
clocks used within PNX15xx Series system can be generated internally with a mixed
combination of PLLs, Direct Digital Synthesizers (DDSs) or simple clock dividers
depending on the clock module requirements. All the clocks are derived from a low
cost 27 MHz crystal clock. This input clock is multiplied internally by 64 to generate a
1.728 GHz clock from which each PNX15xx Series module receives a derived clock.
This internal high speed clock allows minimal jitter on the generated clocks.
The PNX15xx Series system, with its programmable clocks, can be set to operate in 3
different power modes.
•
•
•
Normal mode in which each module runs at the required speed and the CPU
runs at its maximum speed.
Saving mode in which each module runs at required speed and the CPU runs at
the speed that the application needs. For example MP3 audio decoding will
require less than 30 MHz, while a simple profile MPEG-4 video decoding will
require less than 100 MHz.
Sleep mode in which all the clocks of the system are turned off. A small amount
of logic stays alive in order to wake up the system. Before going into sleep mode,
the CPU can decide that some generated clocks, like the PCI clock may remain
active. In that case the clocks are gated for each module belonging to PNX15xx
Series. Also the PCI outgoing clock may be reduced to XTAL_IN (27 MHz
recommended) divided by 16. The system will not respond to incoming PCI
transactions or generate outgoing PCI transactions, but other PCI components
may remain operational.The system can wake up upon one of these three events:
2
C EEPROM boot script that loads a small amount of board level
Rev. 3 — 17 March 2006
2
C EEPROM instead. This boot EEPROM would hold the
2
C EEPROM is required, and no Flash
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX15xx Series
Chapter 2: Overview
2
C EEPROM,
2-7