xc5210 Xilinx Corp., xc5210 Datasheet - Page 31

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xc5210

Manufacturer Part Number
xc5210
Description
Logic Cell Array Family , Inc
Manufacturer
Xilinx Corp.
Datasheet

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Longline Switching Characteristic Guidelines
Testing of the switching parameters is modeled after testing methods specified by MIL-M-38510/605. All devices are
100% functionally tested. Since many internal timing parameters cannot be measured directly, they are derived from
benchmark timing patterns. The following guidelines reflect worst-case values over the recommended operating
conditions. For more detailed, more precise, and more up-to-date timing information, use the values provided by the
XACT timing calculator and used in the simulator.
Note:
Description
TBUF driving a Longline
TS
I to Longline, while TS is Low; i.e., buffer is constantly active
TS going Low to Longline going from floating High or Low to
active Low or High
TS going High to TBUF going inactive, not driving Longline
I
1.
TBUF
Die-size-dependent parameters are based upon XC5210 characterization. Production specifications will vary with array
size.
O
27
Symbol
T
T
T
IO
ON
OFF
Speed Grade
XC5202
XC5204
XC5206
XC5210
XC5215
XC5202
XC5204
XC5206
XC5210
XC5215
XC5202
XC5204
XC5206
XC5210
XC5215
Device
Max
(ns)
4.0
4.0
5.3
5.3
2.4
2.4
-6
Max
(ns)
3.6
3.6
4.8
4.8
2.2
2.2
-5
Max
(ns)
-4
R

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