dspb56011 Freescale Semiconductor, Inc, dspb56011 Datasheet - Page 35

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dspb56011

Manufacturer Part Number
dspb56011
Description
24-bit Dvd Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
HOST INTERFACE (HI) TIMING
MOTOROLA
Num
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
HEN/HACK assertion width
HEN/HACK deassertion width
Host data input setup time before HEN/HACK
deassertion
Host data input hold time after HEN/HACK
deassertion
HEN/HACK assertion to output data active from
high impedance
HEN/HACK assertion to output data valid
HEN/HACK deassertion to output data high
impedance
Output data hold time after HEN/HACK
Deassertion
HR/W low setup time before HEN assertion
HR/W low hold time after HEN deassertion
HR/W high setup time to HEN assertion
HR/W high hold time after HEN/HACK deassertion
HOA0–HOA2 setup time before HEN assertion
HOA0–HOA2 Hold Time After HEN Deassertion
DMA HACK assertion to HOREQ deassertion
DMA HACK deassertion to HOREQ assertion
Note: Active low lines should be “pulled up” in a manner consistent with the AC
CVR, ICR, ISR, RXL read
IVR, RXH/M read
Write
After TXL writes
After RXL reads
Between two CVR, ICR, or ISR reads
For DMA RXL read
For DMA TXL write
All other cases
and DC specifications.
5
6
Table 2-8 Host I/O Timing (All Frequencies)
DSP56011 Technical Data Sheet, Rev. 1
Characteristics
3
2
Preliminary Information
1
1
4
4,5
T
2 T
2 T
2 T
L
T
T
+ T
C
L
Min
2.5
26
13
13
+ T
C
C
4
3
0
0
3
3
3
0
+ 31
C
0
0
3
C
+ 31
+ 31
+ 31
+ T
C
Host Interface (HI) Timing
H
Max
26
45
18
Specifications
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2-9

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