adc16dv160cilq National Semiconductor Corporation, adc16dv160cilq Datasheet - Page 8

• Manufacturer Part Number: adc16dv160cilq
• Description: Dual Channel, 16-bit, 160 Msps Analog-to-digital Converter With Ddr Lvds Outputs
• Manufacturer: National Semiconductor Corporation

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+I
−I
Symbol
LVDS DC SPECIFICATIONS (Apply to pins D0 to D15, OUTCLK)
V
V
Input Clock Frequency (F
Input Clock Frequency (F
Input Clock Amplitude
Data Output Setup Time (T
Data Output Hold Time (T
LVDS Rise/Fall Time (t
Pipeline Latency
Aperture Jitter
Power-Up Time
Power-Down Recovery Time
Sleep Recovery Time
f
t
t
t
t
t
t
t
SCLK
PH
PL
SSU
SH
ODZ
OZD
OD
OD
OS
SC
SC
LVDS Electrical Characteristics
Unless otherwise specified, the following specifications apply: V
f
apply for T
Timing Specifications
Unless otherwise specified, the following specifications apply: V
f
apply for T
Unless otherwise specified, the following specifications apply: V
f
apply for T
Symbol
CLK
CLK
CLK
Symbol
= 160 MSPS at 2.8 V
= 160 MSPS at 2.8 V
= 160 MSPS at 2.8 V
A
MIN
MIN
= T
Output Short Circuit Source Current
Output Short Circuit Source Current
Parameter
Serial Clock Frequency
SCLK Pulse Width - High
SCLK Pulse Width - Low
SDIO Input Data Setup Time
SDIO Input Data Hold Time
SDIO Output Data Driven-to-Tri-State Time
SDIO Output Data Tri-State-to-Driven Time
SDIO Output Data Delay Time
≤
≤
MIN
Parameter
Output Differential Voltage
Output Offset Voltage
T
T
A
A
to T
≤
≤
R,
T
T
t
CLK
CLK
MAX
F
H
MAX
MAX
)
)
SU
PP
PP
PP
(Note
)
)
. All other limits apply for T
)
, A
, A
. All other limits apply for T
, A
. All other limits apply for T
(Note
IN
IN
IN
Parameter
Parameter
10)
= -1dBFS, LVDS R
= -1dBFS, LVDS R
= -1dBFS, LVDS R
10)
Measured at each pin (CLK+, CLK-).
Differential clock is 2.8 Vpp (typ)
Measured @ V
Measured @ V
CL= 5pF to GND, RL= 100Ω
From assertion of Power to specified level
of performance.
From de-assertion of power down mode to
output data available.
From de-assertion of sleep mode to output
data available.
Conditions
100Ω Differential Load
100Ω Differential Load
TERM
TERM
TERM
A
A
A
= +25°C, unless otherwise noted.
OD
OD
= 25°C, unless otherwise noted.
= 25°C, unless otherwise noted.
Conditions
= 100Ω, C
= 100 Ω, C
= 100Ω, C
/2; F
/2; F
f
% of SCLK Period
% of SCLK Period
V
V
SCLK
OUT
OUT
CLK
CLK
A3.0
A3.0
A3.0
8
= 1 / t
= 160 MHz.
= 160 MHz.
= 0V
= V
= 3.0V, V
= 3.0V, V
= 3.0V, V
L
L
L
= 5 pF. Typical values are for T
= 5 pF. Typical values are for T
= 5 pF. Typical values are for T
DR
Conditions
P
Conditions
A1.8
A1.8
A1.8
= 1.8V, V
= 1.8V, V
= 1.8V, V
Min
175
1.1
0.5+ 10
0.1+ 10
DR
DR
DR
1.57
1.55
11.5
Typ
270
100
1.4
= 1.8V, Differential sinusoidal clock,
= 1.8V, Differential sinusoidal clock,
= 1.8V, Differential sinusoidal clock,
20
80
Typ
3
3
*(2
*(2
260
Typ
A
1.2
A
22
19
A
Typical Limits
= 25°C. Boldface limits
= 25°C. Boldface limits
+2
+2
= 25°C. Boldface limits
−10
10
17
17
)/F
)/F
Limits
Max
0.85
160
1.7
CLK
CLK
325
1.3
Max
20
40
60
40
60
15
5
5
5
5
Clock Cycles
MHz (min)
V
V
ps (max)
Units
ns (min)
ns (min)
ps (min)
PP
(Limits)
PP
fs rms
ns (max)
ns (max)
ns (max)
Units
% (max)
% (max)
ns (min)
ns (min)
% (min)
% (min)
MHz
Units
ms
ms
μS
Units
(max)
MHz
mA
(max)
mV
(min)
V