s908ab32ag0cfue Freescale Semiconductor, Inc, s908ab32ag0cfue Datasheet - Page 77

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s908ab32ag0cfue

Manufacturer Part Number
s908ab32ag0cfue
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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5.10 Low Power Modes
5.10.1 Wait Mode
MC68HC908AB32
Freescale Semiconductor
NOTE:
Rev. 1.1
A. Setting the EELAT bit configures the address and data buses to latch
data for erasing the array. Only valid EEPROM addresses will be
latched. If EELAT is set, other writes to the EECR will be allowed after a
valid EEPROM write.
B. If more than one valid EEPROM writes occur, the last address and
data will be latched, overriding the previous address and data. Once
written data to the desired address, do not read EEPROM locations
other than the written location. (Reading an EEPROM location returns
the latched data, and causes the read address to be latched.)
EENVR is not affected by block or bulk erase.
C. The EEPGM bit cannot be set if the EELAT bit is cleared or a non-
valid EEPROM address is latched. This is to ensure proper
programming sequence. Once EEPGM is set, do not read any EEPROM
locations, otherwise the current erase cycle will be unsuccessful. When
EEPGM is set, the erase mode cannot be changed, and the on-board
erasing sequence will be activated.
D. The delay time for the EEPGM bit to be cleared in AUTO mode is less
than t
may be different. For forward compatibility, software should not make
any dependency on this delay time.
E. Any attempt to clear both EEPGM and EELAT bits with a single
instruction will only clear EEPGM. This is to allow time for removal of
high voltage from the EEPROM array.
The WAIT and STOP instructions can put the MCU in low power
consumption standby modes.
The WAIT instruction does not affect the EEPROM. It is possible to start
the program or erase sequence on the EEPROM and put the MCU in
wait mode.
EBYTE
/ t
EBLOCK
EEPROM
/ t
EBULK
. However, on other MCUs, this delay time
Technical Data
EEPROM
77

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