s908ab32ag0cfue Freescale Semiconductor, Inc, s908ab32ag0cfue Datasheet - Page 334

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s908ab32ag0cfue

Manufacturer Part Number
s908ab32ag0cfue
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Input/Output (I/O) Ports
Technical Data
334
NOTE:
DDRG[2:0] — Data Direction Register G Bits
Avoid glitches on port G pins by writing to the port G data register before
changing data direction register G bits from 0 to 1.
the port G I/O logic.
When DDRGx is a logic 1, reading address $000A reads the PTGx data
latch. When DDRGx is a logic 0, reading address $000A reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
Table 17-6
Notes:
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect the input.
These read/write bits control port G data direction. Reset clears
DDRG[2:0], configuring all port G pins as inputs.
DDRG
Bit
0
1
1 = Corresponding port G pin configured as output
0 = Corresponding port G pin configured as input
READ DDRG ($000E)
WRITE DDRG ($000E)
WRITE PTG ($000A)
READ PTG ($000A)
summarizes the operation of the port G pins.
PTG Bit
Input/Output (I/O) Ports
X
X
(1)
Table 17-8. Port G Pin Functions
Figure 17-24. Port G I/O Circuit
RESET
Input, Hi-Z
I/O Pin
Output
Mode
(2)
DDRGx
PTGx
Read/Write
DDRG[2:0]
DDRG[2:0]
Accesses
to DDRG
MC68HC908AB32
PTG[2:0]
Freescale Semiconductor
Figure 17-24
Read
Accesses to PTG
Pin
PTG[2:0]
PTG[2:0]
Write
KBI
shows
Rev. 1.1
PTGx
(3)

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