s908ab32ag0cfue Freescale Semiconductor, Inc, s908ab32ag0cfue Datasheet - Page 287

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s908ab32ag0cfue

Manufacturer Part Number
s908ab32ag0cfue
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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MC68HC908AB32
Freescale Semiconductor
CAPTURE STROBE
FOR REFERENCE
SPSCK; CPOL = 0
MASTER SS
SPSCK; CPOL =1
SPSCK CYCLE #
MISO/MOSI
FROM MASTER
SS; TO SLAVE
SLAVE SS
SLAVE SS
CPHA = 0
CPHA = 1
FROM SLAVE
Rev. 1.1
MOSI
MISO
Figure 16-4. Transmission Format (CPHA = 0)
When CPHA = 0 for a slave, the falling edge of SS indicates the
beginning of the transmission. This causes the SPI to leave its idle state
and begin driving the MISO pin with the MSB of its data. Once the
transmission begins, no new data is allowed into the shift register from
the transmit data register. Therefore, the SPI data register of the slave
must be loaded with transmit data before the falling edge of SS. Any data
written after the falling edge is stored in the transmit data register and
transferred to the shift register after the current transmission.
Serial Peripheral Interface Module (SPI)
MSB
Figure 16-5. CPHA/SS Timing
BYTE 1
MSB
1
BIT 6
BIT 6
2
BIT 5
BIT 5
3
BYTE 2
BIT 4
BIT 4
4
BIT 3
BIT 3
5
Serial Peripheral Interface Module (SPI)
BIT 2
BIT 2
6
BYTE 3
BIT 1
BIT 1
7
LSB
LSB
8
Technical Data
287

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