s908ab32ag0cfue Freescale Semiconductor, Inc, s908ab32ag0cfue Datasheet - Page 155

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s908ab32ag0cfue

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s908ab32ag0cfue
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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9.10.4 Reaction Time Calculation
MC68HC908AB32
Freescale Semiconductor
Rev. 1.1
The actual acquisition and lock times can be calculated using the
equations below. These equations yield nominal values under the
following conditions:
The K factor in the equations is derived from internal PLL parameters.
K
K
9.4.2.2 Acquisition and Tracking
Note the inverse proportionality between the lock time and the reference
frequency.
In automatic bandwidth control mode the acquisition and lock times are
quantized into units based on the reference frequency. See
Manual and Automatic PLL Bandwidth
clock cycles, n
tracking mode entry tolerance ∆
Also, a certain number of clock cycles, n
ACQ
TRK
is the K factor when the PLL is configured in tracking mode. See
is the K factor when the PLL is configured in acquisition mode, and
Correct selection of filter capacitor, C
(see
Room temperature operation
Negligible external leakage on CGMXFC
Negligible noise
Clock Generator Module (CGM)
9.10.3 Choosing a Filter
ACQ
, is required to ascertain whether the PLL is within the
t
LOCK
t
ACQ
t
AL
=
=
=
TRK
t
ACQ
V
------------ -
V
------------ -
f
f
RDV
RDV
DDA
DDA
Modes.
, before exiting acquisition mode.
+
Capacitor)
t
AL
TRK
------------ -
K
------------
K
Modes. A certain number of
ACQ
TRK
4
8
F
, is required to ascertain
,
Clock Generator Module (CGM)
Technical Data
9.4.2.3
155

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