EM639165 Etron Technology Inc., EM639165 Datasheet - Page 18

• Manufacturer Part Number: EM639165
• Description: 8Mega x 16bits SDRAM
• Manufacturer: Etron Technology Inc.

[ Read Interrupted by Write ]
Burst read operation can be interrupted by write of any bank. Random column access is allowed. In this case, the DQ
should be controlled adequately by using the DQM to prevent the bus contention. The output is disabled automatically 1
cycle after WRITE assertion.
Preliminary
BURST INTERRUPTION [ Read Interrupted by Read ]
Burst read operation can be interrupted by new read of any bank. Random column access is allowed READ to READ interval
is minimum 1 CLK..
Command
Command
BA0,1
BA0,1
A0-9
DQM
CLK
A0-9
A10
A11
CLK
A10
A11
DQ
Q
D
READ READ
READ
Y i
00
0
Y i
00
0
Read Interrupted by Read (BL=4, CL=3)
Read Interrupted by Write (BL=4, CL=3)
Y j
00
0
READ
Qai0
Qai0
Y k
10
0
DQM control Write control
Qaj0
18
0
Qaj1 Qbk0 Qbk1
Write
Daj0
Y j
00
0
READ
Daj1
Y l
01
Daj2
Qbk2
Daj3
Qal0
Qal1
Rev 1.0
Qal2
EM639165
Qal3
Feb. 2001