SCANSTA111 National Semiconductor Corporation, SCANSTA111 Datasheet - Page 13

• Manufacturer Part Number: SCANSTA111
• Description: Enhanced Scan Bridge Multidrop Addressable Ieee 1149.1 Jtag Port
• Manufacturer: National Semiconductor Corporation

Instructions
BYPASS
EXTEST
SAMPLE/PRELOAD
IDCODE
UNPARK
PARKTLR
PARKRTI
PARKPAUSE
GOTOWAIT (Note 5)
MODESEL
MODESEL
MODESEL
MODESEL
MCGRSEL
SOFTRESET
LFSRSEL
LFSRON
LFSROFF
CNTRSEL
CNTRON
CNTROFF
DEFAULT_BYPASS (Note 6)
TRANSPARENT0
TRANSPARENT1
TRANSPARENT2
TRANSPARENT3
TRANSPARENT4
TRANSPARENT5
TRANSPARENT6
TRANSPARENT7
DGPIO
DGPIO
DGPIO
DGPIO
Level 2 Protocol
0
1
2
3
1
2
3
(Continued)
Hex Op-Code
CE
FF
AA
E7
C5
C6
C3
8E
C9
0C
8D
A0
A1
A2
A3
A4
A5
A6
A7
B0
B1
B2
B3
00
81
84
82
83
85
03
88
0F
90
07
TABLE 5. Level 2 Protocol and Op-Codes
Binary Op-Code
1111 1111
0000 0000
1000 0001
1010 1010
1110 0111
1100 0101
1000 0100
1100 0110
1100 0011
1000 1110
1000 0010
1000 0011
1000 0101
0000 0011
1000 1000
1100 1001
0000 1100
1000 1101
1100 1110
0000 1111
1001 0000
0000 0111
1010 0000
1010 0001
1010 0010
1010 0011
1010 0100
1010 0101
1010 0110
1010 0111
1011 0000
1011 0001
1011 0010
1011 0011
13
Data Register
Bypass Register
Boundary-Scan Register
Boundary-Scan Register
Device Identification Register
Device Identification Register
Device Identification Register
Device Identification Register
Device Identification Register
Device Identification Register
Mode Register
Mode Register
Mode Register
Mode Register
Multi-Cast Group Register
Device Identification Register
Linear Feedback Shift Register
Device Identification Register
Device Identification Register
32-Bit TCK Counter Register
Device Identification Register
Device Identification Register
Set Bypass_reg as default data register
Transparent Enable Register
Transparent Enable Register
Transparent Enable Register
Transparent Enable Register
Transparent Enable Register
Transparent Enable Register
Transparent Enable Register
Transparent Enable Register
Dedicated GPIO Register
Dedicated GPIO Register
Dedicated GPIO Register
Dedicated GPIO Register
0
1
2
3
0
1
2
3
0
1
2
3
4
5
6
7
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