STV2050A STMicroelectronics, STV2050A Datasheet - Page 62

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STV2050A

Manufacturer Part Number
STV2050A
Description
IC DGTL CONVERGENCE PROC 80-PQFP
Manufacturer
STMicroelectronics
Type
Videor
Datasheet

Specifications of STV2050A

Applications
HDTV
Mounting Type
Surface Mount
Package / Case
80-MQFP, 80-PQFP
Case
QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
STV2050A - SECURITIES
14 SECURITIES
14.1 OVERVIEW
The STV2050A can prevent overcurrents in the convergence coils, or poor programming,
using the following controls:
– At power-on reset, or after a reset, all analog outputs are disabled, and the STV2050A waits
– As long as the internal set-up is not achieved, the outputs remain disabled. The setup dura-
– When setup is achieved, the DAC outputs are not fully released and the values are reduced
– The transfer between EEPROM and embedded RAM of the data stored in register E9 is pro-
– During normal operating mode, each convergence value stored in the embedded RAM is
An error flag is available in read mode through the slave I²C BUS.
14.2 HAMMING ENCODING
The E9 register contains certain values which are protected by a Hamming code: :EEPRO-
Madd[2:0], ADS[1:0] and RWM[2:0]. The Hamming code is stored in the HAM[3:0] bits in the
E9 register.
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ADD 7
until at least 2 pulses of each horizontal and vertical signals are received.
tion is typically 2 field periods.
50% during one field.
tected by a Hamming code.
checked by a parity checker before it is applied to the DACs. If a parity error occurs, the S19
bit in the E3, E4, E5 and E9 resisters are set as follows.
E9
Madd [2:0]
EEPRO-
MSB
6
S19
5 4
D0 BYTE
X
3
X
2
X
0: Parity OK
1: Parity error
1
ADS[
1:0]
0 7
RWM [2:0]
6
5
D1 BYTE
4
X
3
HAM[3:0]
2 1
0
7
X
6
X
5 4
X
D2 BYTE
X
3
X
2
X
1
LSB
X
0
X

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