STV2050A STMicroelectronics, STV2050A Datasheet - Page 56

• Manufacturer Part Number: STV2050A
• Description: IC DGTL CONVERGENCE PROC 80-PQFP
• Manufacturer: STMicroelectronics
• Type: Videor

Specifications of STV2050A

• Applications: HDTV
• Mounting Type: Surface Mount
• Package / Case: 80-MQFP, 80-PQFP
• Case: QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

STV2050A - ELECTRICAL LOOP
A measuring line is inserted in each frame for measuring either the offset or the gain of the am-
plifiers. Therefore, the compensation procedure has to run through the offset/gain measure-
ment and horizontal/vertical channels sequentially. The right comparator is activated by the
timing of the signals on the OGAV and OGAH pins. (Refer to
Programming is possible when the measuring line is inserted using the MLN[8:0] bits in the D5
register.
11.2 LOOP PARAMETER REGISTER
Parameters for the internal loop circuit are defined in the DF register.
Offset and gain compensation can be enabled separately using the OLE and GLE bits.
If the FIN bit in the DF register is ‘high’, the device only carries out one single measurement
during the first time that the compensation is carried out.
The comparison sign of the PORA, PORB and PORC pins can be programmed by using the
DIO bit for the offset and the DIG bit for the gain in the DF register.
The number of measurements that are evaluated for selecting a new compensation value is
determined by the NOM[7:0] bits in the DF register.
Number of deviating results among the NOM measurements that do not lead to a change of
the actual compensation value is determined by the TOL[7:0] bits in the DF register.
11.3 LOOP STATUS REGISTER
All functions for the port control and the gain range control that are influenced by the compen-
sation loop are available via the I²C E4 register. This register is used if the gain and/or offset
loop is handled by an external MCU. The IC internal loop has its own registers which are
mapped to the E4 address in the event of read access to this address.
– The PIA, PIB and PIC bits indicate the status of the PORA, PORB and PORC ports respec-
– The ELO bit indicates if the electrical loop is ready (=1) or not (=0).
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tively.
OLE
GLE
DIG
FIN
0 = Offset Loop activated
1 = Offset Loop disabled
0 = Gain Loop activated
1 = Gail Loop disabled
0: No exception for first loop cycle
1: First loop cycle with fixed parameters for fast operation
0: The level on the port is ‘high’ if the convergence current is too high
1: The level on the port is ‘low’ if the convergence current is too high.
Figure "" on page
8).