STV2050A STMicroelectronics, STV2050A Datasheet - Page 57

• Manufacturer Part Number: STV2050A
• Description: IC DGTL CONVERGENCE PROC 80-PQFP
• Manufacturer: STMicroelectronics
• Type: Videor

Specifications of STV2050A

• Applications: HDTV
• Mounting Type: Surface Mount
• Package / Case: 80-MQFP, 80-PQFP
• Case: QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.4 OPERATION OF THE ELECTRICAL LOOP
The electrical loop is started by the STV2050A reset procedure following the readout of the
EEPROM and the updating of the IC registers once the convergence outputs are enabled (the
S02 and S03 bits in the E3 register are set to 1).
If loop operation is enabled with the OLE and GLE bits, the loop sets the RU1 and RU2 bits to
Low in the EF register which disables the RAM updating the D0*...D3* and E4 registers.
The ELO bit in the E4 register is set to High by the IC reset, which indicates to external MCUs
that the first offset/gain compensation is not yet completed.
If enabled, the offset and the gain compensation procedures are repeated endlessly. If the
offset compensation is enabled by the OLE bit, the measuring line is switched to offset mode
(GOS = 0) and the compensation procedure is done sequentially for horizontal (HVM=1) and
vertical (HVM=0) channels.
If the gain compensation is enabled by the GLE bit, the measuring line is switched to gain
mode (GOS=1) and the compensation procedure is carried out for horizontal (HVM=1) and
vertical (HVM=0) channels.
When the compensation for all channels is completed for the first time, the ELO bit is set to
Low in order to supply this information to external MCUs.
The activity of the internal loop circuit has to be interrupted if the convergence DACs are dis-
abled (which can be detected at the S02 and S03 bits) or if the STL bit in the E3 register is
High or if the GLE and the OLE bits are Low.
11.5 OUTPUT/INPUT PADS
5 pins are dedicated for the electrical loop: PORA, PORB, PORC, OGAH and OGAV.
However, these pins can be used for other purposes and are all programmable.
11.5.1 PORA, PORB and PORC Pins
These pins can be set as either input or output pins using the corresponding PDA, PDB and
PDC bits in the E4 register.
If the ports are set as an input, the value on the port is sampled with the timing set by the PLT
bit in the E4 register.
If the ports are set as an output, the value on the port is given by the value of the POA, POB
or POC bits in the E4 register.
PDA, PDB or PDC
PLT
0 = Input
1 = Output
0: by the system clock
1: at the end of the measuring line
STV2050A - ELECTRICAL LOOP
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