ATxmega256A3U Atmel Corporation, ATxmega256A3U Datasheet - Page 12

• Manufacturer Part Number: ATxmega256A3U
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3U

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7.4.1
7.4.2
7.4.3
8386A–AVR–07/11
I/O Memory
SRAM Data Memory
EEPROM Data Memory
The Status and configuration registers for peripherals and modules, including the CPU, are
addressable through I/O memory locations. All I/O locations can be accessed by the load
(LD/LDS/LDD) and store (ST/STS/STD) instructions, which is used to transfer data between the
32 registers in the Register File and the I/O memory. The IN and OUT instructions can address
I/O memory locations in the range 0x00 - 0x3F directly. In the address range 0x00 - 0x1F, sin-
gle- cycle instructions for manipulation and checking of individual bits are available.
The I/O memory address for all peripherals and modules in XMEGA A3U is shown in the
”Peripheral Module Address Map” on page
The devices have internal SRAM memory for data storage.
The devices have internal EEPROM memory for non-volatile data storage. It is addressable
either in a separate data space or it can be memory mapped into the normal data memory
space. The EEPROM memory supports both byte and page access.
56.
XMEGA A3U
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