NUC130LE3CN Nuvoton Technology Corporation of America, NUC130LE3CN Datasheet - Page 544

• Manufacturer Part Number: NUC130LE3CN
• Description: IC MCU 32BIT 128KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™ NUC100r

Specifications of NUC130LE3CN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

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[5]
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[2]
[1]
NuMicro™ NUC130/NUC140 Technical Reference Manual
PT[2:0]
Reserved
ISPFF
LDUEN
CFGUEN
APUEN
Reserved
BS
Flash Program Time (write-protection bits)
Reserved
ISP Fail Flag (write-protection bit)
This bit is set by hardware when a triggered ISP meets any of the following conditions:
(1) APROM writes to itself if APUEN is set to 0
(2) LDROM writes to itself
(3) CONFIG is erased/programmed if CFGUEN is set to 0
(4) Destination address is illegal, such as over an available range
Write 1 to clear.
LDROM Update Enable (write-protection bit)
LDROM update enable bit.
1 = LDROM can be updated when the chip runs in APROM
0 = LDROM can not be updated
Enable Config-bits Update by ISP (write-protection bit)
1 = Enable ISP can update config-bits
0 = Disable ISP can update config-bits
APROM Update Enable (write-protection bit)
1 = APROM can be updated when the chip runs in APROM
0 = APROM can not be updated when the chip runs in APROM
Reserved
Boot Select (write-protection bit)
Set/clear this bit to select next booting from LDROM/APROM, respectively. This bit
also functions as chip booting status flag, which can be used to check where chip
booted from. This bit is initiated with the inversed value of CBS in Config0 after any
reset is happened except CPU reset (RSTS_CPU is 1) or system reset (RSTS_SYS)
is happened
1 = boot from LDROM
0 = boot from APROM
PT[2]
0
0
0
0
1
1
1
1
PT[1]
0
0
1
1
0
0
1
1
- 544 -
PT[0]
0
1
0
1
0
1
0
1
Publication Release Date: June 14, 2011
Program Time (us)
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Revision V2.01