MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 271

MC9S12C128VFU

Manufacturer Part Number
MC9S12C128VFU
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12C128VFU

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/SCI/SPI
Program Memory Type
Flash
Program Memory Size
128KB
Total Internal Ram Size
4KB
# I/os (max)
60
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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The sequence for clock quality check is shown in
1. A Clock Monitor Reset will always set the SCME bit to logical’1’
Freescale Semiconductor
POR
check window
Clock OK
or clock monitor reset
check the OSCCLK signal.
The clock quality checker enables the PLL and the voltage regulator
(VREG) anytime a clock check has to be performed. An ongoing clock
quality check could also cause a running PLL (f
during pseudo-stop mode or wait mode
LVR
Remember that in parallel to additional actions caused by self-clock mode
osc ok
num=0
active?
SCM
?
yes
no
exit full stop
no
yes
Figure 9-20. Sequence for Clock Quality Check
CM fail
Switch to OSCCLK
MC9S12C-Family / MC9S12GC-Family
1
handling the clock quality checker continues to
num=num+1
Exit SCM
num<50
?
yes
Rev 01.24
NOTE
NOTE
Clock Monitor Reset
Enter SCM
Figure
Chapter 9 Clocks and Reset Generator (CRGV4) Block Description
no
9-20.
yes
SCM
) and an active VREG
SCME=1
active?
SCM
?
no
yes
no
num=50
271

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