MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 232

MC9S12C128VFU

Manufacturer Part Number
MC9S12C128VFU
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12C128VFU

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/SCI/SPI
Program Memory Type
Flash
Program Memory Size
128KB
Total Internal Ram Size
4KB
# I/os (max)
60
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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Chapter 8 Analog-to-Digital Converter (ATD10B8C) Block Description
8.3.2.4
This register controls the conversion sequence length, FIFO for results registers and behavior in Freeze
Mode. Writes to this register will abort current conversion sequence but will not start a new sequence.
Read: Anytime
Write: Anytime
232
Module Base + 0x0003
S8C, S4C,
S2C, S1C
ASCIE
Reset
ASCIF
Field
Field
6–3
1
0
W
R
ATD Sequence Complete Interrupt Enable
0 ATD Sequence Complete interrupt requests are disabled.
1 ATD Interrupt will be requested whenever ASCIF = 1 is set.
ATD Sequence Complete Interrupt Flag — If ASCIE = 1 the ASCIF flag equals the SCF flag (see
Section 8.3.2.7, “ATD Status Register 0
0 No ATD interrupt occurred
1 ATD sequence complete interrupt pending
Conversion Sequence Length — These bits control the number of conversions per sequence.
all combinations. At reset, S4C is set to 1 (sequence length is 4). This is to maintain software continuity to HC12
Family.
ATD Control Register 3 (ATDCTL3)
0
0
7
= Unimplemented or Reserved
S8C
ETRIGLE
0
6
Table 8-1. ATDCTL2 Field Descriptions (continued)
0
0
1
1
Figure 8-6. ATD Control Register 3 (ATDCTL3)
Table 8-2. External Trigger Configurations
Table 8-3. ATDCTL3 Field Descriptions
MC9S12C-Family / MC9S12GC-Family
S4C
ETRIGP
1
5
0
1
0
1
(ATDSTAT0)”), else ASCIF reads zero. Writes have no effect.
Rev 01.24
S2C
0
4
External Trigger Sensitivity
Description
Description
Falling edge
Rising edge
High level
Low level
S1C
0
3
FIFO
0
2
Freescale Semiconductor
FRZ1
0
1
Table 8-4
FRZ0
0
0
shows

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