CYNSE70256-66BHC Cypress Semiconductor Corp, CYNSE70256-66BHC Datasheet - Page 18

• Manufacturer Part Number: CYNSE70256-66BHC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE70256-66BHC

• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Package Type: BGA
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

During a Search operation, the search data bit (S), data array bit (D), mask array bit (M), and global mask bit (G) are used in the
following manner to generate a match at that bit position (see Table 8-1). The entry with a match on every bit position results in
a successful Search.
Table 8-1. Bit Position Match
In order for a successful Search within a device to make the device the local winner, all 72-bit positions must generate a match
for a 72-bit entry in 72-bit-configured quadrants, or all 144-bit positions must generate a match for two consecutive even and odd
72-bit entries in quadrants configured as 144 bits, or all 288-bit positions must generate a match for four consecutive entries
aligned to four entry-page boundaries of 72-bit entries in quadrants configured as 288 bits.
An arbitration mechanism using a cascade bus determines the global winning device among the local winning devices in a Search
cycle. The global winning device drives the SRAM bus, the SSV, and the SSF signals. In case of a Search failure, the device(s)
with a bank with the LDEV and LRAM bits set drives the SRAM bus, SSF, and SSV signals.
The CYNSE70256 device can be configured to contain tables of different widths, even within the same chip. Figure 8-2 shows
a sample configuration of different widths.
Document #: 38-02035 Rev. *E
G
0
1
1
1
1
1
Figure 8-2. Multiwidth Database Configurations Example
Bank 0
Bank 1
M
X
0
1
1
1
1
16K
32K
32K
8K
72
144
D
X
X
0
1
0
1
288
CFG (Bank 0)= 11 11 11 11 00 00 00 00
CFG (Bank 1)= 10 10 10 10 01 01 01 01
Inactive (low power).
S
X
X
0
0
1
1
CYNSE70256
Match
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1
1
1
0
0
1