XRP7714ILB-0X18-F Exar Corporation, XRP7714ILB-0X18-F Datasheet - Page 24

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XRP7714ILB-0X18-F

Manufacturer Part Number
XRP7714ILB-0X18-F
Description
IC CTRLR PWM/LDO STP-DWN 40TQFN
Manufacturer
Exar Corporation
Series
-r
Datasheet

Specifications of XRP7714ILB-0X18-F

Topology
Step-Down (Buck) Synchronous (4), Linear (LDO) (1)
Function
Any Function
Number Of Outputs
5
Frequency - Switching
1.5MHz
Voltage/current - Output 1
Controller
Voltage/current - Output 2
Controller
Voltage/current - Output 3
Controller
W/led Driver
No
W/supervisor
No
W/sequencer
Yes
Voltage - Supply
4.75 V ~ 25 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
*
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
1016-1699
The GPIOs can be configured to signal Fault or Warning conditions when they occur in the chip.
Each GPIO can be configured to signal one of the following:
I
The I
The communication has the option of enabling Packet Error Checking in order to deal with noisy
environments where bit-errors could occur in the communication. This packet error checking is a
CRC-8 code appended to all communication between the Host and the IC.
Each XRP7714 in an I
address always has to be sent as the first byte after the start condition in the I
There is one address byte required since 7-bit addresses are used. The last bit of the address byte
is the read/write-bit and should always be set according to the required operation. This 7-bit I
address is stored in the NVM. One can program a blank device with the 7-bit Slave address or
select one of the preprogrammed options. The 7-bit address plus the R/W bit create an 8-bit data
value that is sent on the bus.
The XRP7714ILB-0X10-F has an I
a data value of 0x20 and read by sending a data value of 0x21. This reflects the address being
shifted one bit to the left and the least significant bit being set to reflect a read or write operation
in order to stuff the byte correctly.
The second byte sent to the XRP7714 is the location of a specific register.
GPIO3 may be used to change the LSB of the 7-bit address. This option can be enabled within the
PowerArchitect
top right of the “Digital Design” tab.
changing the default I2C address of the part are available in ANP-31 “Power
Programming”.
© 2011 Exar Corporation
2
Fault and Warning Indication
C C
Using GPIO3 to select I
2
OMMUNICATION
C communication is standard 2-wire communication available between the Host and the IC.
OCP Fault on Channel 1 - 4
OCP Warning on Channel 1 - 4
OVP Fault on Channel 1 - 4
UVLO Fault on VIN1 or VIN2
UVLO Warning on VIN1 or VIN2
Over Temperature Fault or Warning
TM
software by checking the “Use GPIO3 to control LSB of I2C address” box at the
2
C -bus system is activated by sending a valid address to the device. The
2
C Address
MSB
6
Fig. 30: Alignment of I2C address in 8 bit byte
2
C address of 0x10. The internal registers are written by sending
Q
Q
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