XRP7714ILB-F Exar Corporation, XRP7714ILB-F Datasheet
XRP7714ILB-F
Specifications of XRP7714ILB-F
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XRP7714ILB-F Summary of contents
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... The device offers a complete solution including independently programmable: soft-start, soft- stop, start-up delay and ramp of each PWM regulator. TYPICAL APPLICATION DIAGRAM Exar Corporation 48720 Kato Road, Fremont CA 94538, USA ...
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... VOUT regulation range VOUT set point resolution VOUT set point resolution VOUT Input Current VOUT Input Resistance Note 1: Voltages above 5.1V can be obtained by using an external voltage divider. Low Drop-out Regulator Parameter LDOOUT Output Voltage LDO=LOW LDOOUT Output Voltage © 2010 Exar Corporation ...
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... Digital Input/Output Pins (GPIO0-GPIO5) 3.3V CMOS logic compatible, 5V tolerant. Parameter Input Pin Low Level Input Pin High Level Input Pin Leakage Current Input pin Capacitance Output Pin Low Level Output Pin High Level Output Pin High Level (no load) © 2010 Exar Corporation ...
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... Output Fall Time from V to IHMIN 20+0.1C V ILMAX Capacitance for each I/O Pin Note the capacitance of one bus Gate Drivers Parameter GH, GL Rise and Fall Time GH, GL Pull-up On-State Output Resistance GH, GL Pull-down On-State Output Resistance GH, GL Pull-down Off-State Output Resistance © 2010 Exar Corporation ...
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... BLOCK DIAGRAM © 2010 Exar Corporation Fig. 2: XRP7714 Block Diagram 5/ Rev. 1.1 ...
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... PIN ASSIGNMENT PIN DESCRIPTION Name Pin Number 39 VIN1 38 VIN2 37 VCCA 26 VCCD 36,31,16,21 PGND1- PGND4 1 AVDD 2 DVDD 10 DGND © 2010 Exar Corporation Fig. 3: XRP7714 Pin Assignment Power source for the internal linear regulators to generate VCCA, VDD and the Standby LDO (LDOOUT). Place a decoupling capacitor close to the controller IC. Also used in UVLO1 fault generation – ...
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... VOUT1-VOUT4 40 LDOOUT 9 ENABLE Exposed Pad AGND ORDERING INFORMATION Part Number Temperature Range XRP7714ILB- F -40°C≤T ≤+125°C J XRP7714ILBTR-F -40°C≤T ≤+125°C J XRP7714 Evaluation Board XRP7714EVB “YY” = Year – “WW” = Work Week – “X” = Lot Number © ...
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... Fig. 6: 5Vin Efficiency: Single Channel 300kHz - Channels not in use are disabled FET: Si4944; Inductor: 744314xxx 7x7x5mm 100% 90% 80% 70% 60% 50 Output Current Amps Fig. 8: 12Vin Combined Efficiency 5V & 3V3 1V8 & 1V 300 kHz FET: FDS8984; Inductor: 744310200 7x7x3mm © 2010 Exar Corporation ...
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... VIN (V) Fig. 10: Shutdown Current 5.1V to 25V Fig. 12: Simultaneous Start-up CH1:3.3V, CH2:5V, CH3:1V, CH4:1.8V Fig. 14: Sequential Start-up CH1:3.3V, CH2:5V, CH3:1V, CH4:1.8V © 2010 Exar Corporation 2000 1800 1600 1400 1200 1000 ...
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... CH1:3.3V, CH2:5V, CH3:1V, CH4:1.8V 1.818 1.814 1.81 1.806 1.802 1.798 1.794 1.79 1.786 1.782 ‐40 ‐ Ambient, Degrees C Fig. 18: Temperature Regulation 1.8V out (±1% Vout window) Fig. 20: Temperature and Voltage Regulation 1.8V out (±1% Vout window) © 2010 Exar Corporation ...
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... Fault reporting (including OCP, OVP, Temperature, Soft-Start in progress, Power Good) − Allows a Logic Level interface with other non-digital IC’ logic inputs to other devices − Possible to configure as traditional ‘enable’ pin for all 4 outputs © 2010 Exar Corporation ...
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... The figure below shows the power-up sequence of XRP7714 during the normal operation. The startup stage is divided into three phases. The first phase is the internal LDO power-up phase. The second phase is the configuration transfer phase. The third phase is chip ready phase. The power up sequence is less than 1ms. © 2010 Exar Corporation ...
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... The 5V output setting of the regulator is only available if VIN1 is above 6.5V, and the 3.3V output setting is available for the entire VIN1 range from 4.75 to 25V NABLING ISABLING AND The XRP7714 is enabled via raising the ENABLE Pin high. lowering the same ENABLE Pin. SOFTRESET Command. © 2010 Exar Corporation ...
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... When the warning threshold is reached, the Host is informed via a GPIO or by reading the READ_WARN_FLAG register. The SET_UVLO_TARG_VINx register that controls the under voltage fault set point condition at 100mV increments. This fault condition will be indicated in the READ_FAULT_WARN register. © 2010 Exar Corporation ...
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... READ_VOUTx register. Output Voltage from 0.9V to 5.1V Per the equation below, for values between 0.9V and 5.1V the output voltage is equal to the binary number stored in the SET_VOUT_TARGET_CHx register multiplied by 50mV. When programming an © 2010 Exar Corporation ...
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... The second shutdown is a ‘brute force’ shutdown where the GL remains on as the channel reaches its discharged voltage. Note that if the ‘brute force’ method is chosen, then GL will permanently remain high until the channel is re-enabled. © 2010 Exar Corporation Q u ...
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... Bits [15:10] specify the delay after enabling a channel but before outputting pulses; where each bit represents 250µs steps. Bits [9:0] specify the rise time of the channel; these 10 bits define the number of microseconds for each 50mV increment to reach the target voltage. © 2010 Exar Corporation Q u ...
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... PWM S F WITCHING REQUENCY The PWM switching frequency is set by choosing the corresponding oscillator frequency and clock divider ratio in the SET_SW_FREQUENCY register. Bits [6:4] set the oscillator frequency and bits © 2010 Exar Corporation ...
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... MOSFET is on, this depends on the frequency of the main oscillator and the selected PWM frequency best to choose the highest main oscillator frequency available for any specific PWM frequency. The maximum duty cycle for each PWM frequency is shown in the table below: © 2010 Exar Corporation Q u ...
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... IC will run on the internal clock that was specified by the user. If the external clock fails the user can chose to have the internal clock take over, using the automatic switch back mode in the SET_SYNC_MODE_CONFIG register. © 2010 Exar Corporation Q u ...
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... All of the same rules apply as in the External clock synchronization, Synchronized operation as a Slave unit section of this document. either the external clock going to both Master/Slave CLK_IN, or CLK_IN can go to the Master, and the Master can synchronize SYNC_OUT and CLK_OUT to the Slave. © 2010 Exar Corporation ...
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... The polarity of the GPIO pin can be set by using the GPIO_ACT_POL register. This register allows any GPIO pin whether configured as an input or output to change polarity. Bits [5:0] are used to set the polarity of GPIO 0 though 5. If the IC operates in I [5:4] are ignored. © 2010 Exar Corporation ...
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... Select the Inductor for inductance L and saturation current Isat. Select an inductor with Isat higher than the programmed over current limit. Calculate inductance from: Where: Vin is the converter input voltage Vout is the converter output voltage fs is the switching frequency © 2010 Exar Corporation ...
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... Cout is the output capacitance Note that a smaller inductor results in a higher Irip, therefore requiring a larger Cout and/or lower ESR in order to meet Vrip. With the current generation of ultra-low ESR ceramic capacitors it is common to operate with Irip ≥ 30% of Iout. © 2010 Exar Corporation ...
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... Selecting MOSFETs with lower Rdson reduces conduction losses at the expense of increased switching losses. A simplified expression for conduction losses is given by: MOSFET’s junction temperature can be estimated from: This assumes that the switching loss is the same as the conduction loss. thermal resistance from junction to ambient. © 2010 Exar Corporation ...
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... PACKAGE SPECIFICATION 40 TQFN IN MMX MM © 2010 Exar Corporation 26/ Rev. 1.1 ...
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... While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized ...