SC16IS850LIPW,128 NXP Semiconductors, SC16IS850LIPW,128 Datasheet - Page 39

• Manufacturer Part Number: SC16IS850LIPW,128
• Manufacturer: NXP Semiconductors

Specifications of SC16IS850LIPW,128

• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
SC16IS850L
Product data sheet
Fig 14. I
master write:
master read:
combined
formats:
2
C-bus data formats
S
START condition
S
START condition
S
START condition
9.3 Addressing
9.4 Use of subaddresses
SLAVE ADDRESS
SLAVE ADDRESS
SLAVE ADDRESS
Before any data is transmitted or received, the master must send the address of the
receiver via the SDA line. The first byte after the START condition carries the address of
the slave device and the read/write bit.
can be selected by using A1 and A0 pins. For example, if these 2 pins are connected to
V
through this address.
Table 33.
[1]
byte following the slave address byte. This subaddress is the internal address of the word
the master wants to access for a single byte transfer, or the beginning of a sequence of
A1
V
V
V
V
When a master communicates with the SC16IS850L it must send a subaddress in the
DD
DD
DD
SS
SS
, then the SC16IS850L’s address is set to 0x90, and the master communicates with it
X = logic 0 for write cycle; X = logic 1 for read cycle.
read or
write
write
read
R/W
W
SC16IS850L address map
R
A0
V
V
V
V
DD
SS
DD
SS
acknowledge
acknowledge
acknowledge
A
A
A
All information provided in this document is subject to legal disclaimers.
(n bytes + acknowledge)
data transferred
DATA
DATA
DATA
0x90 (1001 000X)
0x92 (1001 001X)
0x98 (1001 100X)
0x9A (1001 101X)
SC16IS750/760 I
Rev. 1 — 22 July 2011
acknowledge
(n bytes + acknowledge)
(n bytes + acknowledge)
data transferred
data transferred
A
acknowledge
A
acknowledge
A
Sr
repeated
START condition
Table 33
2
C addresses (hex)
SLAVE ADDRESS
DATA
DATA
may change at this point
acknowledge
acknowledge
STOP condition
STOP condition
Single UART with I
shows how the SC16IS850L’s address
direction of transfer
not
NA
read or
A
write
R/W
P
P
[1]
acknowledge
A
SC16IS850L
(n bytes + acknowledge)
data transferred
2
C-bus/SPI interface
DATA
© NXP B.V. 2011. All rights reserved.
acknowledge
STOP condition
002aab458
A
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P