SC16IS850LIPW,112 NXP Semiconductors, SC16IS850LIPW,112 Datasheet - Page 31

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SC16IS850LIPW,112

Manufacturer Part Number
SC16IS850LIPW,112
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SC16IS850LIPW,112

Lead Free Status / Rohs Status
Compliant
NXP Semiconductors
SC16IS850L
Product data sheet
8.15 Transmit Interrupt Level Register (TXINTLVL)
8.16 Receive Interrupt Level Register (RXINTLVL)
Table 22.
[1]
This 8-bit register is used to store the transmit FIFO trigger levels used for interrupt
generation. Trigger levels from 1 to 128 can be programmed with a granularity of 1.
Table 23
Table 23.
[1]
This 8-bit register is used store the receive FIFO trigger levels used for interrupt
generation. Trigger levels from 1 to 128 can be programmed with a granularity of 1.
Table 24
Table 24.
Cont-3
0
1
0
1
X
X
X
1
0
1
Bit
7:0
Bit
7:0
When using a software flow control the Xon/Xoff characters cannot be used for data transfer.
For 32-byte FIFO mode, refer to
Symbol
TXINTLVL[7:0]
shows the TXINTLVL register bit settings.
shows the RXINTLVL register bit settings.
Symbol
RXINTLVL[7:0]
Cont-2
0
0
1
1
X
X
X
0
1
1
Software flow control functions
TXINTLVL register bits description
RXINTLVL register bits description
All information provided in this document is subject to legal disclaimers.
Cont-1
X
X
X
X
0
1
0
1
1
1
Rev. 1 — 22 July 2011
Description
This register stores the programmable transmit interrupt trigger levels
for 128-byte FIFO mode
Description
This register stores the programmable receive interrupt trigger levels
for 128-byte FIFO mode
0x00 = trigger level is set to 1
0x01 = trigger level is set to 1
...
0x80 = trigger level is set to 128
0x00 = trigger level is set to 1
0x01 = trigger level is set to 1
...
0x80 = trigger level is set to 128
Cont-0
X
X
X
X
0
0
1
1
1
1
Section
8.3.
TX, RX software flow controls
No transmit flow control
Transmit Xon1/Xoff1
Transmit Xon2/Xoff2
Transmit Xon1 and Xon2/Xoff1 and Xoff2
No receive flow control
Receiver compares Xon1/Xoff1
Receiver compares Xon2/Xoff2
Transmit Xon1/Xoff1
Receiver compares Xon1 or Xon2, Xoff1 or Xoff2
Transmit Xon2/Xoff2
Receiver compares Xon1 or Xon2, Xoff1 or Xoff2
Transmit Xon1 and Xon2, Xoff1 and Xoff2
Receiver compares Xon1 and Xon2, Xoff1 and Xoff2
[1]
[1]
[1]
Single UART with I
.
.
SC16IS850L
2
C-bus/SPI interface
© NXP B.V. 2011. All rights reserved.
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