SC16IS850LIPW,112 NXP Semiconductors, SC16IS850LIPW,112 Datasheet - Page 28

• Manufacturer Part Number: SC16IS850LIPW,112
• Manufacturer: NXP Semiconductors

Specifications of SC16IS850LIPW,112

• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
SC16IS850L
Product data sheet
8.8 Modem Status Register (MSR)
This register shares the same address as EFCR register. This is a read-only register and
it provides the current state of the control interface signals from the modem, or other
peripheral device to which the SC16IS850L is connected. Four bits of this register are
used to indicate the changed information. These bits are set to a logic 1 whenever a
control input from the modem changes state. These bits are set to a logic 0 whenever the
CPU reads this register.
When write, the data will be written to EFCR register.
Table 19.
[1]
Bit
7
6
5
4
2
1
0
3
Whenever any MSR bit 3:0 is set to logic 1, a Modem Status Interrupt will be generated.
Symbol
MSR[7]
MSR[6]
MSR[5]
MSR[4]
MSR[3]
MSR[2]
MSR[1]
MSR[0]
Modem Status Register bits description
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CD. During normal operation, this bit is the complement of the CD input.
DSR. During normal operation, this bit is the complement of the DSR input.
CTS. During normal operation, this bit is the complement of the CTS input.
Description
Reading this bit in the loopback mode produces the state of MCR[3] (OP2).
RI. During normal operation, this bit is the complement of the RI input.
Reading this bit in the loopback mode produces the state of MCR[2] (OP1).
During the loopback mode, this bit is equivalent to MCR[0] (DTR).
During the loopback mode, this bit is equivalent to MCR[1] (RTS).
CD
RI
DSR
CTS
logic 0 = no CD change (normal default condition)
logic 1 = the CD input to the SC16IS850L has changed state since the
last time it was read. A modem Status Interrupt will be generated.
logic 0 = no RI change (normal default condition)
logic 1 = the RI input to the SC16IS850L has changed from a logic 0 to a
logic 1. A modem Status Interrupt will be generated.
logic 0 = no DSR change (normal default condition)
logic 1 = the DSR input to the SC16IS850L has changed state since the
last time it was read. A modem Status Interrupt will be generated.
logic 0 = no CTS change (normal default condition)
logic 1 = the CTS input to the SC16IS850L has changed state since the
last time it was read. A modem Status Interrupt will be generated.
Rev. 1 — 22 July 2011
[1]
[1]
[1]
[1]
Single UART with I
SC16IS850L
2
C-bus/SPI interface
© NXP B.V. 2011. All rights reserved.
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