MT16HTF25664HZ-667H1 Micron Technology Inc, MT16HTF25664HZ-667H1 Datasheet - Page 12

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MT16HTF25664HZ-667H1

Manufacturer Part Number
MT16HTF25664HZ-667H1
Description
MODULE DDR2 SDRAM 2GB 200SODIMM
Manufacturer
Micron Technology Inc
Series
-r

Specifications of MT16HTF25664HZ-667H1

Memory Type
DDR2 SDRAM
Memory Size
2GB
Speed
667MT/s
Features
-
Package / Case
200-SODIMM
Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
200SODIMM
Device Core Size
64b
Organization
256Mx64
Total Density
2GByte
Chip Density
128Mb
Access Time (max)
900ns
Package Type
SODIMM
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Operating Current
1.136A
Number Of Elements
16
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
200
Mounting
Socket
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Table 10: DDR2 I
Values shown for MT47H64M8 DDR2 SDRAM only and are computed from values specified in the 512Mb (64 Meg x 8)
component data sheet
Table 11: DDR2 I
Values shown for MT47H128M8 DDR2 SDRAM only and are computed from values specified in the 1Gb (128 Meg x 8) com-
ponent data sheet
PDF: 09005aef8339ef97
htf16c128_256_512x64hz.pdf - Rev. C 9/10 EN
Parameter
Operating bank interleave read current: All device banks interleaving reads;
I
=
valid commands; Address bus inputs are stable during deselects; Data bus inputs
are switching
Parameter
Operating one bank active-precharge current:
t
bus inputs are switching; Data bus inputs are switching
Operating one bank active-read-precharge current: I
CL (I
(I
switching; Data pattern is same as I
Precharge power-down current: All device banks idle;
LOW; Other control and address bus inputs are stable; Data bus inputs are floating
Precharge quiet standby current: All device banks idle;
HIGH, S# is HIGH; Other control and address bus inputs are stable; Data bus in-
puts are floating
Precharge standby current: All device banks idle;
S# is HIGH; Other control and address bus inputs are switching; Data bus inputs
are switching
Active power-down current: All device banks open;
t
bus inputs are stable; Data bus inputs are floating
Active standby current: All device banks open;
MAX (I
er control and address bus inputs are switching; Data bus inputs are switching
Operating burst write current: All device banks open; Continuous burst
writes; BL = 4, CL = CL (I
t
are switching; Data bus inputs are switching
OUT
RAS =
CK =
RP (I
DD
t
RC (I
); CKE is HIGH, S# is HIGH between valid commands; Address bus inputs are
DD
= 0mA; BL = 4, CL = CL (I
DD
t
CK (I
), AL = 0;
DD
DD
t
); CKE is HIGH, S# is HIGH between valid commands; Address bus inputs
RAS MIN (I
),
),
DD
t
t
RP =
RRD =
); CKE is LOW; Other control and address
t
CK =
t
RP (I
DD
t
RRD (I
DD
DD
); CKE is HIGH, S# is HIGH between valid commands; Address
Notes:
DD
t
CK (I
Specifications and Conditions – 1GB (Continued)
Specifications and Conditions – 2GB (Die Revision E and G)
DD
); CKE is HIGH, S# is HIGH between valid commands; Oth-
DD
), AL = 0;
DD
),
DD
t
),
RCD =
1. Value calculated as one module rank in this operating condition; all other module ranks
2. Value calculated reflects all module ranks in this operating condition.
), AL =
t
RC =
in I
DD4W
t
CK =
t
DD2P
t
RCD (I
RC (I
t
RCD (I
1GB, 2GB, 4GB (x64, DR) 200-Pin DDR2 SDRAM SODIMM
t
(CKE LOW) mode.
CK (I
DD
DD
),
DD
); CKE is HIGH, S# is HIGH between
t
DD
) - 1 ×
RAS =
),
t
CK =
t
t
RAS =
CK =
t
CK =
t
t
CK (I
RAS MIN (I
t
CK (I
Fast PDN exit MR[12] = 0
Slow PDN exit MR[12] = 1
t
CK (I
t
OUT
t
CK =
t
RAS MAX (I
DD
t
CK (I
CK =
12
DD
);
= 0mA; BL = 4, CL =
DD
t
),
CK =
t
DD
CK (I
),
t
DD
t
CK (I
); CKE is HIGH,
RAS =
t
RC =
),
t
DD
t
CK (I
RCD =
DD
DD
Micron Technology, Inc. reserves the right to change products or specifications without notice.
); CKE is
t
t
),
); CKE is
RC (I
RAS
DD
t
RP =
),
t
RCD
DD
t
RC
),
Symbol
Symbol -1GA
I
I
I
I
I
I
DD4W
DD2Q
I
I
DD2N
DD3N
DD2P
DD3P
I
DD0
DD1
DD7
1
1
1
2
2
2
2
2
1
© 2008 Micron Technology, Inc. All rights reserved.
-1GA
1096
1120
1736
IDD Specifications
TBD
976
112
960
960
800
160
-80E/
-80E/
2456 1976
1336 1136
-800
-800
776
936
112
800
800
640
160
960
-667 Units
-667 Units
736
856
112
640
640
480
160
880
mA
mA
mA
mA
mA
mA
mA
mA
mA

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