MT16HTF25664HZ-667H1 Micron Technology Inc, MT16HTF25664HZ-667H1 Datasheet - Page 9

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MT16HTF25664HZ-667H1

Manufacturer Part Number
MT16HTF25664HZ-667H1
Description
MODULE DDR2 SDRAM 2GB 200SODIMM
Manufacturer
Micron Technology Inc
Series
-r

Specifications of MT16HTF25664HZ-667H1

Memory Type
DDR2 SDRAM
Memory Size
2GB
Speed
667MT/s
Features
-
Package / Case
200-SODIMM
Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
200SODIMM
Device Core Size
64b
Organization
256Mx64
Total Density
2GByte
Chip Density
128Mb
Access Time (max)
900ns
Package Type
SODIMM
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Operating Current
1.136A
Number Of Elements
16
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
200
Mounting
Socket
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Table 10:
PDF: 09005aef8339ef97/Source: 09005aef8339eff3
HTF16C128_256x64HZ.fm - Rev. A 5/08 EN
Parameter/Condition
Operating one bank active-precharge current:
t
commands; Address bus inputs are switching; Data bus inputs are switching
Operating one bank active-read-precharge current: I
CL = CL (I
t
bus inputs are switching; Data pattern is same as I
Precharge power-down current: All device banks idle;
is LOW; Other control and address bus inputs are stable; Data bus inputs are
floating
Precharge quiet standby current: All device banks idle;
CKE is HIGH, S# is HIGH; Other control and address bus inputs are stable; Data
bus inputs are floating
Precharge standby current: All device banks idle;
HIGH, S# is HIGH; Other control and address bus inputs are switching; Data
bus inputs are switching
Active power-down current: All device banks open;
t
inputs are stable; Data bus inputs are floating
Active standby current: All device banks open;
t
commands; Other control and address bus inputs are switching; Data bus
inputs are switching
Operating burst write current: All device banks open; Continuous burst
writes; BL = 4, CL = CL (I
t
inputs are switching; Data bus inputs are switching
Operating burst read current: All device banks open; Continuous burst
reads; I
t
commands; Address bus inputs are switching; Data bus inputs are switching
Burst refresh current:
t
control and address bus inputs are switching; Data bus inputs are switching
Self refresh current: CK and CK# at 0V; CKE ≤ 0.2V; Other control and
address bus inputs are floating; Data bus inputs are floating
Operating bank interleave read current: All device banks interleaving
reads; I
t
HIGH, S# is HIGH between valid commands; Address bus inputs are stable
during deselects; Data bus inputs are switching
RC =
RCD =
CK =
RAS =
RP =
RAS =
RFC (I
CK =
t
t
t
t
RP (I
DD
RC (I
CK (I
CK (I
t
t
t
OUT
OUT
RAS MAX (I
RAS MAX (I
RCD (I
) interval; CKE is HIGH, S# is HIGH between valid commands; Other
DD
DD
DD
DD
= 0mA; BL = 4, CL = CL (I
= 0mA; BL = 4, CL = CL (I
DD
), AL = 0;
); CKE is HIGH, S# is HIGH between valid commands; Address bus
),
DDR2 I
Values are for the MT47H128M8 DDR2 SDRAM only and are computed from values specified in the
1Gb (128 Meg x 8) component data sheet
); CKE is LOW; Other control and address bus
),
DD
t
t
RAS =
RC =
); CKE is HIGH, S# is HIGH between valid commands; Address
Notes:
DD
DD
t
t
),
),
CK =
DD
RC (I
t
RAS MIN (I
t
t
DD
RP =
RP =
t
CK =
Specifications and Conditions – 2GB
), AL = 0;
DD
t
CK (I
1. Value calculated as one module rank in this operating condition; all other module ranks in
2. Value calculated reflects all module ranks in this operating condition.
t
t
),
RP (I
RP (I
t
CK (I
t
I
RRD =
DD
DD
1GB, 2GB (x64, DR) 200-Pin Halogen-Free DDR2 SDRAM SODIMM
DD
2
DD
DD
),
P (CKE LOW) mode.
DD
DD
t
DD
); CKE is HIGH, S# is HIGH between valid
CK =
t
); CKE is HIGH, S# is HIGH between valid
); CKE is HIGH, S# is HIGH between valid
RC =
), AL = 0;
), AL =
); REFRESH command at every
t
RRD (I
t
CK (I
t
RC (I
t
DD
RCD (I
DD
t
),
DD
CK =
),
t
t
DD
RCD =
),
CK =
t
t
DD
RAS =
t
CK =
t
4W
RAS =
CK =
t
CK (I
) - 1 ×
t
CK (I
t
t
t
RCD (I
OUT
CK =
CK (I
t
t
DD
t
CK (I
RAS MAX (I
t
CK =
RAS MIN (I
9
t
DD
),
CK (I
= 0mA; BL = 4,
DD
t
Fast PDN exit
MR[12] = 0
Slow PDN exit
MR[12] = 1
),
CK (I
DD
DD
t
),
CK (I
DD
); CKE is
); CKE is
DD
);
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD
DD
DD
); CKE
);
),
),
Symbol
I
I
I
I
I
I
I
DD
DD
DD
DD
DD
I
I
DD
DD
I
I
I
DD
DD
DD
DD
DD
4W
2Q
2N
3N
4R
2P
3P
0
1
5
6
7
1
1
2
2
1
2
2
1
2
2
2
1
1,336 1,136 1,056
1,336 1,136 1,056
3,760 3,440 3,360 3,280
2,736 2,296 2,216 2,136
-80E/
-800 -667 -53E -40E Units
Electrical Specifications
776
936
112
800
800
640
160
960
112
©2008 Micron Technology, Inc. All rights reserved
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856
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480
160
880
112
616
816
112
640
640
480
160
720
112
896
896
616
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112
560
560
480
160
640
112
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA

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