PCA9574HR,115 NXP Semiconductors, PCA9574HR,115 Datasheet - Page 11

• Manufacturer Part Number: PCA9574HR,115
• Description: IC I/O EXPANDER I2C 8B 16HXQFN
• Manufacturer: NXP Semiconductors

Specifications of PCA9574HR,115

• Interface: I²C, SMBus
• Number Of I /o: 8
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 1.1 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-XQFN (Exposed Pad), 16-eXQFN, 16-HXQFN
• Includes: POR
• Logic Family: CMOS
• Number Of Lines (input / Output): 8 / 8
• Operating Supply Voltage: 1.1 V to 3.6 V
• Power Dissipation: 75 mW
• Operating Temperature Range: - 40 C to + 85 C
• Input Voltage: 1.1 V to 4.1 V
• Logic Type: I2C Bus Extender
• Maximum Clock Frequency: 400 KHz
• Maximum Operating Frequency: 400 KHz
• Mounting Style: SMD/SMT
• Number Of Input Lines: 8
• Number Of Output Lines: 8
• Output Current: +/- 5 mA
• Output Voltage: 1.1 V to 4.1 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-4936-2

NXP Semiconductors
PCA9574_2
Product data sheet
7.5.6 Register 5 - Output port register
7.5.7 Register 6 - Interrupt mask register
This register is an output-only port. It reflects the outgoing logic levels of the pins defined
as outputs by Register 4. Bit values in this register have no effect on pins defined as
inputs. In turn, reads from this register reflect the value that is in the flip-flop controlling the
output selection, not the actual pin value.
Table 10.
Legend: * default value.
All the bits of Interrupt mask register are set to logic 1 upon power-on or software reset,
thus disabling interrupts. Interrupts may be enabled by setting corresponding mask bits to
logic 0.
Table 11.
Legend: * default value.
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
Symbol
O0.7
O0.6
O0.5
O0.4
O0.3
O0.2
O0.1
O0.0
Symbol
M0.7
M0.6
M0.5
M0.4
M0.3
M0.2
M0.1
M0.0
Register 5 - Output port register (address 05h) bit description
Register 6 - Interrupt mask register (address 06h) bit description
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Rev. 02 — 27 July 2009
8-bit I
2
Value
0*
0*
0*
0*
0*
0*
0*
0*
Value
1*
1*
1*
1*
1*
1*
1*
1*
C-bus and SMBus, level translating, low voltage GPIO
Description
reflects outgoing logic levels of pins defined as
outputs by Register 4
Description
enable or disable interrupts
0 = enable interrupt
1 = disable interrupt (default value)
PCA9574
© NXP B.V. 2009. All rights reserved.
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