ADV7391BCPZ Analog Devices Inc, ADV7391BCPZ Datasheet - Page 57

• Manufacturer Part Number: ADV7391BCPZ
• Description: IC ENCODER VIDEO W/DAC 32-LFCSP
• Manufacturer: Analog Devices Inc
• Type: Video Encoderr

Specifications of ADV7391BCPZ

• Applications: Set-Top Boxes, Video Players, Displays
• Voltage - Supply, Analog: 2.6 V ~ 3.46 V
• Voltage - Supply, Digital: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Supply Voltage Range: 1.71V To 1.89V
• Operating Temperature Range: -40°C To +85°C
• Tv / Video Case Style: LFCSP
• No. Of Pins: 32
• Svhc: No SVHC (18-Jun-2010)
• Operating Temperature Max: 85°C
• Operating: RoHS Compliant
• Input Format: Digital
• Output Format: Analogue
• Dac Resolution: 10bit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADV7391EBZ - BOARD EVAL FOR ADV7391 ENCODER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SD LUMA AND COLOR SCALE CONTROL
Subaddress 0x9C to Subaddress 0x9F
When enabled, the SD luma and color scale control feature can
be used to scale the SD Y, Cb, and Cr output levels. This feature
can be enabled using Subaddress 0x87, Bit 0. This feature affects
all SD output signals, that is, CVBS, Y-C, YPrPb, and RGB.
When enabled, three 10-bit registers (SD Y scale, SD Cb scale,
and SD Cr scale) control the scaling of the SD Y, Cb, and Cr
output levels. The SD Y scale register contains the scaling factor
used to scale the Y level from 0.0 to 1.5 times its initial level.
The SD Cb scale and SD Cr scale registers contain the scaling
factors to scale the Cb and Cr levels from 0.0 to 2.0 times their
initial levels, respectively.
The values to be written to these 10-bit registers are calculated
using the following equation:
For example, if Scale Factor = 1.3
Subaddress 0x9C, SD scale LSB = 0x2A
Subaddress 0x9D, SD Y scale register = 0xA6
Subaddress 0x9E, SD Cb scale register = 0xA6
Subaddress 0x9F, SD Cr scale register = 0xA6
It is recommended that the SD luma scale saturation feature
(Subaddress 0x87, Bit 1) be enabled when scaling the Y output
level to avoid excessive Y output levels.
SD HUE ADJUST CONTROL
Subaddress 0xA0
When enabled, the SD hue adjust control register (Subaddress
0xA0) is used to adjust the hue on the SD composite and
chroma outputs. This feature can be enabled using Subaddress
0x87, Bit 2.
Subaddress 0xA0 contains the bits required to vary the hue of
the video data, that is, the variance in phase of the subcarrier
during active video with respect to the phase of the subcarrier
during the color burst. The ADV739x provides a range of
±22.5° in increments of 0.17578125°. For normal operation
(zero adjustment), this register is set to 0x80. Value 0xFF and
Value 0x00 represent the upper and lower limits, respectively, of
the attainable adjustment in NTSC mode. Value 0xFF and Value
0x01 represent the upper and lower limits, respectively, of the
attainable adjustment in PAL mode.
The hue adjust value is calculated using the following equation:
Where HCR
Y, Cb, or Cr Scale Value = Scale Factor × 512
Y, Cb, or Cr Scale Value = 1.3 × 512 = 665.6
Y, Cb, or Cr Scale Value = 666 ( rounded to the nearest integer )
Y, Cb, or Cr Scale Value = 1010011010b
Hue Adjust (°) = 0.17578125° ( HCR
d
= the hue adjust control register (decimal).
d
− 128)
Rev. B | Page 57 of 108
For example, to adjust the hue by +4°, write 0x97 to the hue
adjust control register.
where the sum is rounded to the nearest integer.
To adjust the hue by −4°, write 0x69 to the hue adjust control
register.
where the sum is rounded to the nearest integer.
SD BRIGHTNESS DETECT
Subaddress 0xBA
The ADV739x allows monitoring of the brightness level of the
incoming video data. This feature is used to monitor the
average brightness of the incoming Y signal on a field-by-field
basis. The information is read from the I
information, the color saturation, contrast, and brightness
controls can be adjusted (for example, to compensate for very
dark pictures).
The luma data is monitored in the active video area only. The
average brightness I
every VSYNC signal. The SD brightness detect register (Subad-
dress 0xBA) is a read-only register.
SD BRIGHTNESS CONTROL
Subaddress 0xA1, Bits[6:0]
When this feature is enabled, the SD brightness/WSS control
register (Subaddress 0xA1) is used to control brightness by
adding a programmable setup level onto the scaled Y data. This
feature can be enabled using Subaddress 0x87, Bit 3.
For NTSC with pedestal, the setup can vary from 0 IRE to 22.5 IRE.
For NTSC without pedestal (see Figure 72) and for PAL, the
setup can vary from −7.5 IRE to +15 IRE.
100 IRE
The SD brightness control register is an 8-bit register. The seven
LSBs of this 8-bit register are used to control the brightness
level, which can be a positive or negative value.
For example, to add a +20 IRE brightness level to an NTSC
signal with pedestal, write 0x28 to Subaddress 0xA1.
0 IRE
ADV7390/ADV7391/ADV7392/ADV7393
0 × (SD Brightness Value) =
0 × ( IRE Value × 2.015631) =
0 × (20 × 2.015631) = 0 × (40.31262) ≈ 0x28
⎛
⎜
⎝
⎛
⎜
⎝
NTSC WITHOUT PEDESTAL
. 0
. 0
17578125
17578125
VALUE ADDED
NO SETUP
−
4
Figure 72. Examples of Brightness Control Values
4
⎞
⎟
⎠
⎞
⎟
⎠
2
+
+
C register is updated on the falling edge of
128
128
POSITIVE SETUP
VALUE ADDED
≈
≈
151
105
d
d
=
=
x 0
x 0
97
9 6
2
C and, based on this
NEGATIVE SETUP
VALUE ADDED
+7.5 IRE
–7.5 IRE