PIC18F1320-I/SO Microchip Technology Inc., PIC18F1320-I/SO Datasheet - Page 58

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PIC18F1320-I/SO

Manufacturer Part Number
PIC18F1320-I/SO
Description
Microcontroller; 8 KB Flash; 256 RAM; 256 EEPROM; 16 I/O; 18-Pin-PDIP
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F1320-I/SO

A/d Inputs
7-Channel, 10-Bit
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin SOIC
Programmable Memory
8K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F1320-I/SO
Manufacturer:
MICROCHIP
Quantity:
35 000
Part Number:
PIC18F1320-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
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PIC18F1220/1320
5.14
The Reset Control (RCON) register contains flag bits
that allow differentiation between the sources of a
device Reset. These flags include the TO, PD, POR,
BOR and RI bits. This register is readable and writable.
REGISTER 5-3:
DS39605C-page 56
RCON Register
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
RCON REGISTER
bit 7
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
Unimplemented: Read as ‘0’
RI: RESET Instruction Flag bit
1 = The RESET instruction was not executed (set by firmware only)
0 = The RESET instruction was executed causing a device Reset
TO: Watchdog Time-out Flag bit
1 = Set by power-up, CLRWDT instruction or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down Detection Flag bit
1 = Set by power-up or by the CLRWDT instruction
0 = Cleared by execution of the SLEEP instruction
POR: Power-on Reset Status bit
1 = A Power-on Reset has not occurred (set by firmware only)
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit
1 = A Brown-out Reset has not occurred (set by firmware only)
0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)
Legend:
R = Readable bit
-n = Value at POR
R/W-0
IPEN
(must be set in software after a Brown-out Reset occurs)
U-0
U-0
W = Writable bit
‘1’ = Bit is set
R/W-1
RI
Note 1: If the BOR configuration bit is set (Brown-
2: It is recommended that the POR bit be set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-1
TO
out Reset enabled), the BOR bit is ‘1’ on
a Power-on Reset. After a Brown-out
Reset has occurred, the BOR bit will be
cleared and must be set by firmware to
indicate the occurrence of the next
Brown-out Reset.
after a Power-on Reset has been
detected, so that subsequent Power-on
Resets may be detected.
R-1
PD
 2004 Microchip Technology Inc.
x = Bit is unknown
R/W-0
POR
R/W-0
BOR
bit 0

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