PIC12F675-E/P Microchip Technology Inc., PIC12F675-E/P Datasheet - Page 25

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PIC12F675-E/P

Manufacturer Part Number
PIC12F675-E/P
Description
8 PIN, 1.75 KB FLASH, 64 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC12F675-E/P

A/d Inputs
4-Channel, 10-Bit
Comparators
1
Cpu Speed
5 MIPS
Eeprom Memory
128 Bytes
Input Output
5
Memory Type
Flash
Number Of Bits
8
Package Type
8-pin PDIP
Programmable Memory
1.75K Bytes
Ram Size
64 Bytes
Speed
20 MHz
Timers
1-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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Manufacturer:
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3.3.3
Figure 3-2 shows the diagram for this pin. The GP2 pin
is configurable to function as one of the following:
• a general purpose I/O
• an analog input for the A/D (PIC12F675 only)
• the clock input for TMR0
• an external edge triggered interrupt
• a digital output from the comparator
FIGURE 3-2:
 2003 Microchip Technology Inc.
TRISIO
Data Bus
PORT
PORT
Interrupt-on-Change
WPU
WPU
TRISIO
WR
WR
WR
WR
IOC
IOC
RD
RD
RD
RD
D
D
D
D
To TMR0
To INT
To A/D Converter
CK
CK
CK
CK
GP2/AN2/T0CKI/INT/COUT
Q
Q
Q
Q
Q
Q
Q
Q
Input Mode
BLOCK DIAGRAM OF GP2
Analog
Enable
COUT
COUT
GPPU
Input Mode
Analog
RD PORT
1
0
Q
Q
Analog
Mode
Input
EN
EN
D
D
V
DD
Weak
V
V
DD
SS
I/O pin
3.3.4
Figure 3-3 shows the diagram for this pin. The GP3 pin
is configurable to function as one of the following:
• a general purpose input
• as Master Clear Reset
FIGURE 3-3:
Data Bus
PORT
Interrupt-on-Change
IOC
TRISIO
IOC
WR
RD
RD
RD
D
CK
GP3/MCLR/V
PIC12F629/675
Q
Q
RESET
BLOCK DIAGRAM OF GP3
V
SS
PP
RD PORT
MCLRE
Q
Q
MCLRE
EN
EN
DS41190C-page 23
D
D
V
SS
I/O pin

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