PIC12F675-E/P Microchip Technology Inc., PIC12F675-E/P Datasheet - Page 22

• Manufacturer Part Number: PIC12F675-E/P
• Description: 8 PIN, 1.75 KB FLASH, 64 RAM, 6 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC12F675-E/P

• A/d Inputs: 4-Channel, 10-Bit
• Comparators: 1
• Cpu Speed: 5 MIPS
• Eeprom Memory: 128 Bytes
• Input Output: 5
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 8-pin PDIP
• Programmable Memory: 1.75K Bytes
• Ram Size: 64 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC12F629/675
REGISTER 3-2:
REGISTER 3-3:
DS41190C-page 20
bit 7-6:
bit 5-0:
bit 7-6
bit 5-4
bit 3
bit 2-0
TRISIO — GPIO TRISTATE REGISTER (ADDRESS: 85h)
WPU — WEAK PULL-UP REGISTER (ADDRESS: 95h)
bit 7
Unimplemented: Read as ’0’
TRISIO<5:0>: General Purpose I/O Tri-State Control bit
1 = GPIO pin configured as an input (tri-stated)
0 = GPIO pin configured as an output.
Unimplemented: Read as ‘0’
WPU<5:4>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
WPU<2:0>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Note 1: Global GPPU must be enabled for individual pull-ups to be enabled.
bit 7
Legend:
R = Readable bit
- n = Value at POR
Legend:
R = Readable bit
- n = Value at POR
Note:
U-0
U-0
—
—
2: The weak pull-up device is automatically disabled if the pin is in Output mode
(TRISIO = 0).
TRISIO<3> always reads 1.
U-0
U-0
—
—
TRISIO5
R/W-x
WPU5
R/W-1
W = Writable bit
’1’ = Bit is set
W = Writable bit
’1’ = Bit is set
TRISIO4
R/W-x
WPU4
R/W-1
TRISIO3
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U-0
—
R-1
R/W-1
WPU2
TRISIO2 TRISIO1
R/W-x
 2003 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-1
WPU1
R/W-x
TRISIO0
WPU0
R/W-1
R/W-x
bit 0
bit 0