DP83907VF National Semiconductor, DP83907VF Datasheet - Page 42

IC CONTROLLR AT/LANII TP 160PQFP

DP83907VF

Manufacturer Part Number
DP83907VF
Description
IC CONTROLLR AT/LANII TP 160PQFP
Manufacturer
National Semiconductor
Datasheet

Specifications of DP83907VF

Controller Type
Network Interface Controller (NIC)
Interface
Twisted Pair
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
150mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
160-MQFP, 160-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*DP83907VF

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6 0 Operation of DP83907
6 3 PACKET RECEPTION
The Local DMA receive channel uses a Buffer Ring Struc-
ture comprised of a series of contiguous fixed length 256
byte (128 word) buffers for storage of received packets The
location of the Receive Buffer Ring is programmed in two
registers a Page Start and a Page Stop Register Ethernet
packets consist of a distribution of shorter link control pack-
ets and longer data packets the 256 byte buffer length pro-
vides a good compromise between short packets and long-
er packets to most efficiently use memory In addition these
buffers provide memory resources for storage of back-to-
back packets in loaded networks The assignment of buffers
for storing packets is controlled by Buffer Management Log-
ic in the DP83907 The Buffer Management Logic provides
three basic functions linking receive buffers for long pack-
ets recovery of buffers when a packet is rejected and recir-
culation of buffer pages that have been read by the host
At initialization a portion of the 64k byte (or 32k word) ad-
dress space is reserved for the receive buffer ring Two
eight bit registers
(PSTART) and the Page Stop Address Register (PSTOP)
define the physical boundaries of where the buffers reside
The DP83907 treats the list of buffers as a logical ring
whenever the DMA address reaches the Page Stop Ad-
dress the DMA is reset to the Page Start Address
FIGURE 29 Buffer Ring at Initialization
the Page Start Address Register
(Continued)
TL F 12082–24
42
Initialization of the Buffer Ring
Two static registers and two working registers control the
operation of the Buffer Ring These are the Page Start Reg-
ister Page Stop Register (both described previously) the
Current Page Register and the Boundary Pointer Register
The Current Page Register points to the first buffer used to
store a packet and is used to restore the DMA for writing
status to the Buffer Ring or for restoring the DMA address in
the event of a Runt packet a CRC or Frame Alignment
error The Boundary Register points to the first packet in the
Ring not yet read by the host If the local DMA address ever
reaches the Boundary reception is aborted The Boundary
Pointer is also used to initialize the Remote DMA for remov-
ing a packet and is advanced when a packet is removed A
simple analogy to remember the function of these registers
is that the Current Page Register acts as a Write Pointer and
the Boundary Pointer acts as a Read Pointer
Note 1 At initialization the Page Start Register value should be loaded into
both the Current Page Register and the Boundary Pointer Register if using
the Send Packet Command If using manual Remote Reads the Current
Page Register must always remain 1
Note 2 The Page Start Register must not be initialized to 00H
Beginning of Reception
When the first packet begins arriving the DP83907 begins
storing the packet at the location pointed to by the Current
Page Register An offset of 4 bytes is saved in this first
buffer to allow room for storing receive status correspond-
ing to this packet
FIGURE 30 Received Packet Enters the Buffer Pages
a
Boundary Register
TL F 12082-25

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