DP83907VF National Semiconductor, DP83907VF Datasheet - Page 11

IC CONTROLLR AT/LANII TP 160PQFP

DP83907VF

Manufacturer Part Number
DP83907VF
Description
IC CONTROLLR AT/LANII TP 160PQFP
Manufacturer
National Semiconductor
Datasheet

Specifications of DP83907VF

Controller Type
Network Interface Controller (NIC)
Interface
Twisted Pair
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
150mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
160-MQFP, 160-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*DP83907VF

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4 0 Functional Description
On a remote read the DP83907 moves data from its internal
memory map to the I O port and the host system reads it by
using an ‘‘INW’’ or ‘‘INSW’’ instruction from the I O address
of the data transfer port If the system attempts to read the
port before DP83907 has written the next word of data to it
DP83907 will insert wait states into the system cycle using
the CHRDY line DP83907 will not begin the next memory
read until the previous word of data has been read
On a remote write the system writes data to the I O port
using an ‘‘OUTW’’ or ‘‘OUTSW’’ instruction and DP83907
moves it to its buffer memory If the system attempts to
write to the port before DP83907 has moved the data to
memory DP83907 will insert wait states into the system cy-
cle using the CHRDY line DP83907 will not begin the next
memory write until a new word has been written to the I O
port
Addresses 00H to 1FH are specified as the PROM space
for compatibility with the NE2000 Architecture This is actu-
ally an array of 8-bit registers which are loaded from an
external EEPROM after DP83907 is initialized by an ISA RE-
SET They should contain the same data as the PROM did
in the NE2000 Architecture and in the same format To
transfer the data out the user must initiate a 16-bit DMA
read transfer and discard the most significant byte of data
on each transfer
At address 00H of the PROM is a six byte Ethernet address
for this node The upper two addresses of the PROM store
contain bytes which identify whether the DP83907 is in 8-bit
or 16-bit mode For 16-bit mode these bytes both contain
the value 57H for 8-bit mode they both contain 42H
8-BIT I O PORT COMPATIBLE MODE
This mode is compatible with the 8-bit mode offered by No-
vells NE2000 Architecture The NE2000 automatically de-
tects whether it is in an 8-bit or 16-bit slot and configures
itself appropriately As explained in the previous para-
graphs the user can determine whether the board is in 8-bit
or 16-bit mode by reading the PROM In 8-bit mode only
8 Kbytes of RAM are addressable as in the 8-bit mode of
the NE2000 Architecture The I O map is the same as the
16-bit mode the memory map is shown in Figure 5 Again
the PROM has only a partial decode so is mirrored at all
addresses up to 4000H The PROM still occupies 32 bytes
of address space although it only has 16 bytes of data as
the data at all odd address locations is merely a mirror of
the data at the previous even address location
A low cost card using only one 8 Kbyte RAM can be de-
signed If the function on MSA9 is left unconnected then
the DP83907 will always operate in 8-bit mode regardless
of the slot the board is in
(Continued)
11
4 2 POWER ON RESET OPERATION
The DP83907 configures itself after a Reset signal is ap-
plied To be recognized as a valid Power-On-Reset the Re-
set signal must be active for at least 415 s Figure 6 shows
how the RESET circuitry operates
1Eh
1Ch
0Ah
08h
06h
04h
02h
00h
7FFFh
0000h
0020h
4000h
6000h
FIGURE 5 a) 8-Bit NIC Core’s Memory Map
FIGURE 6 RESET Operation
E’net Address 5
E’net Address 4
E’net Address 3
E’net Address 2
E’net Address 1
E’net Address 0
RESERVED
b) 8-Bit PROM Map
D15
42h
42h
8k x 8 BUFFER RAM
(b)
(a)
Aliased PROM
RESERVED
PROM
E’net Address 5
E’net Address 4
E’net Address 3
E’net Address 2
E’net Address 1
E’net Address 0
RESERVED
42h
42h
D0
TL F 12082– 6

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