AD1981BJSTZ Analog Devices Inc, AD1981BJSTZ Datasheet - Page 21

IC CODEC STEREO MICPREAMP 48LQFP

AD1981BJSTZ

Manufacturer Part Number
AD1981BJSTZ
Description
IC CODEC STEREO MICPREAMP 48LQFP
Manufacturer
Analog Devices Inc
Series
SoundMAX®r
Type
Audio Codec '97r
Datasheet

Specifications of AD1981BJSTZ

Data Interface
Serial
Resolution (bits)
16, 20 b
Number Of Adcs / Dacs
4 / 2
Sigma Delta
No
Dynamic Range, Adcs / Dacs (db) Typ
85 / 90
Voltage - Supply, Analog
4.5 V ~ 5.5 V
Voltage - Supply, Digital
3 V ~ 3.47 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Single Supply Voltage (typ)
3.3/5V
Single Supply Voltage (min)
3/4.5V
Single Supply Voltage (max)
3.47/5.5V
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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POWER-DOWN CONTROL/STATUS REGISTER
Index 0x26
Reg No.
0x26
Table 28.
Bit
ADC
DAC
ANL
REF
PR [6:0]
EAPD
Table 29.
Power-Down State
ADCs and Input MUX Power-Down
DACs Power-Down
Analog Mixer Power-Down (V
Analog Mixer Power-Down (V
AC-Link Interface Power-Down
Internal Clocks Disabled
ADC and DAC Power-Down
V
Total Power-Down
Headphone Amp Power-In Standby
ready. Ready is defined as the subsection able to perform in its nominal state.
All registers are not shown, and bits containing an X are assumed to be reserved.
The ready bits are read-only; writing to REF, ANL, DAC, ADC has no effect. These bits indicate the status for the AD1981B subsections. If the bit is a 1, that subsection is
REF
Standby Mode
Name
Power-Down Ctrl/Stat
Mnemonic
Codec Power-
Down Modes
External Audio
Power-Down
Control
REF
REF
D15
EAPD
and V
and V
Function
ADC Sections Ready to Transmit Data.
DAC Sections Ready to Accept Data.
Analog Amplifiers, Attenuators, and Mixers Ready.
Voltage References, V
The first three bits are to be used individually rather than in combination with each other. PR3 can be
used in combination with PR2 or by itself. The mixer and reference cannot be powered down via PR3
unless the ADCs and DACs are also powered down.
Nothing else can be powered up until the reference is powered up. PR5 has no effect unless all ADCs,
DACs, and the ac-link are powered down. The reference and the mixer can be either powered up or
powered down, but all power-up sequences must be allowed to run to completion before PR5 and PR4
are both set.
In multiple codec systems, the master codec’s PR5 and PR4 bits control the slave codec. PR5 is also
effective in the slave codec, if the master’s PR5 bit is clear, but the PR4 bit has no effect except to enable or
disable PR5.
Controls the state of the EAPD pin.
EAPD = 0 sets the EAPD pin low, enabling an external power amplifier (reset default).
EAPD = 1 sets the EAPD pin high, shutting the external power amplifier off.
REFOUT
REFOUT
D14
PR6
On)
Off)
D13
PR5
D12
PR4
Set Bits
PR1
PR1, PR2
PR0, PR1, PR3
PR4
PR0, PR1, PR4, PR5
PR0, PR1
PR0, PR1, PR2, PR4, PR5
PR0, PR1, PR2, PR3, PR4, PR5, PR6
PR6
PR0
REF
and V
D11
PR3
Rev. C | Page 21 of 32
REFOUT
D10
PR2
, Up to Nominal Level.
D9
PR1
D8
PR0
X
D7
D6
X
PR [6:0]
[000 0001]
[000 0010]
[000 0101]
[000 1011]
[001 0000]
[011 0011]
[000 0011]
[011 0111]
[111 1111]
[100 0000]
D5
X
D4
X
D3
REF
D2
ANL
D1
DAC
AD1981B
D0
ADC
Default
0x000X

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