IDTSTAC9753AXNAED1XR IDT, Integrated Device Technology Inc, IDTSTAC9753AXNAED1XR Datasheet - Page 77

IC CODEC AC'97 MIC/JACK 32-QFN

IDTSTAC9753AXNAED1XR

Manufacturer Part Number
IDTSTAC9753AXNAED1XR
Description
IC CODEC AC'97 MIC/JACK 32-QFN
Manufacturer
IDT, Integrated Device Technology Inc
Type
Audio Codec '97r
Datasheet

Specifications of IDTSTAC9753AXNAED1XR

Resolution (bits)
20 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
Yes
S/n Ratio, Adcs / Dacs (db) Typ
85 / 92
Voltage - Supply, Analog
3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-QFN
Single Supply Voltage (typ)
3.3/5V
Single Supply Voltage (min)
3.135V
Single Supply Voltage (max)
3.465/5.25V
Package Type
VFQFPN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
STAC9753AXNAED1XR
IDT™
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
STAC9752A/9753A
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
7.4.6.
Bit(s) Reset Value
3-1
4
0
Digital Audio Control (6Ah, Page 00h)
To access Register 6Ah, Page 00h must be selected in Register 24h.
D5:D15
G[4:0]
00000
00001
01111
10001
11111
D3:1
Bit
D4
D0
Reg 66h Function Code
All other Function Codes
NA
1
0
01h Headphone Out
00h Line Out
05h Mic1
06h Mic2
Reserved
Name
FIP
IV
Table 25. Register 68h/Page 01h Bit Overview
Read/Write and only reset on POR (Power on Reset) and not by RESET#.
For RESET#: Reg 68h default value is 0000h.
Information Valid Bit: Indicates whether a sensing method is provided by the
CODEC and if information field is valid. This field is updated by the CODEC.
0h--After CODEC RESET# de-assertion, it indicates the CODEC does NOT
provides sensing logic and this bit will be Read Only. After a sense cycle is
completed indicates that no information is provided on the sensing method.
1h--After CODEC RESET# de-assertion, it indicates the CODEC provides
sensing logic for this I/O and this bit is Read/Write. After clearing this bit by
writing1, when a sense cycle is completed the assertion of this bit indicates that
there is valid information in the remaining descriptor bits. Writing 0 to this bit has
no effect.
BIOS should NOT write this bit, as it is reset on RESET#.
Bit not used, should read back 0
Function Information Present
This bit is set to a 1 indicates that the G[4:0], INV, DL[4:0](Register 68h, Page
01h) and ST[2:0](register 6Ah, Page 01h) are supported and R/W capable.
This bit is Read Only.
Table 24. Gain or Attenuation Examples
Table 23. Reg 68h Default Values
Read/Write and should NOT be set by the BIOS
Gain or Attenuation (dB relative to level-out)
77
Bit R/W Overview
Read Only.
Reserved
+1.5 dBV
+24 dBV
-1.5 dBV
-24 dBV
0 dBV
Description
Reg 68h Default Value
STAC9752A/9753A
0010h
0010h
0010h
0010h
0000h
PC AUDIO
V 1.5 1206

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