CS4270-DZZ Cirrus Logic Inc, CS4270-DZZ Datasheet - Page 34

• Manufacturer Part Number: CS4270-DZZ
• Description: IC CODEC 24BIT 105DB 24TSSOP
• Manufacturer: Cirrus Logic Inc
• Type: Stereo Audior

Specifications of CS4270-DZZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 105
• Voltage - Supply, Analog: 3.1 V ~ 5.25 V
• Voltage - Supply, Digital: 3.1 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Audio Codec Type: Stereo
• No. Of Adcs: 1
• No. Of Dacs: 1
• No. Of Input Channels: 3
• No. Of Output Channels: 3
• Adc / Dac Resolution: 24bit
• Sampling Rate: 216kSPS
• Ic Interface Type: I2C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1002 - BOARD EVAL FOR CS4270 CODEC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1622

34
7. REGISTER QUICK REFERENCE
This table shows the register names and their associated default values.
Addr
01h
02h
03h
04h
05h
06h
07h
08h
ID
Power
Control
Funct Mode
Serial Format
Transition
Control
Mute
Vol Ctrl
AOUTA
Vol Ctrl
AOUTB
Function
ADC HPF
Single Vol
Reserved Reserved
Reserved Reserved Auto Mute
Freeze A
Freeze
vol<7>
vol<7>
id<3>
dacA
dacB
DAC
7
0
0
0
1
0
0
0
0
ADC HPF
Reserved PDN_ADC
Freeze B
soft_dac
vol<6>
vol<6>
id<2>
dacA
dacB
6
0
0
0
1
0
0
0
1
FM_&_M/S
Loopback
_Mode1
zc_dac
vol<5>
vol<5>
Digital
id<1>
dacA
dacB
5
1
0
0
0
0
1
0
1
FM_&_M/S_
DAC_DIF1
Invert ADC
Mute ADC
Reserved
SP ch B
Mode0
vol<4>
vol<4>
id<0>
dacA
dacB
ch B
4
0
0
1
0
0
0
0
0
Invert ADC
DAC_DIF0
Mute ADC
Reserved
SP ch A
freq<2>
rev<3>
vol<3>
vol<3>
MCLK
dacA
dacB
ch A
3
0
0
0
0
0
0
0
0
Invert DAC
Reserved
Reserved
freq<1>
Polarity
rev<2>
vol<2>
vol<2>
MCLK
Mute
dacA
dacB
ch B
2
0
0
0
0
0
0
0
0
PDN_DAC
Invert DAC
Mute DAC
Reserved
freq<0>
rev<1>
vol<1>
vol<1>
MCLK
dacA
dacB
ch A
ch B
1
0
0
0
0
0
0
0
0
CS4270
DS686PP1
ADC_DIF0
Mute DAC
PopGuard
De-Emph
Disable
rev<0>
vol<0>
vol<0>
dacA
dacB
PDN
ch A
0
0
0
0
1
0
0
0
0