CY7C64013-SC Cypress Semiconductor Corp, CY7C64013-SC Datasheet - Page 35

• Manufacturer Part Number: CY7C64013-SC
• Description: IC MCU 8K FULL SPEED USB 28SOIC
• Manufacturer: Cypress Semiconductor Corp
• Series: M8™r

Specifications of CY7C64013-SC

• Applications: USB Microcontroller
• Core Processor: M8C
• Program Memory Type: OTP (8 kB)
• Controller Series: CY7C640xx
• Ram Size: 256 x 8
• Interface: I²C, USB, HAPI
• Number Of I /o: 19
• Voltage - Supply: 4 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• For Use With: 428-1339 - KIT LOW SPEED PERSONALITY BOARD
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1327

Bits[6..0] :Device Address
Bit 7
Bit 7 (Device Address Enable) in the USB Device Address Register must be set by firmware before the SIE can respond to USB traffic to this
address. The Device Addresses in bits [6:0] are set by firmware during the USB enumeration process to the non-zero address assigned by the
USB host.
18.2
The CY7C64x13 controller supports one USB device address and five endpoints for communication with the host. The configu-
ration of these endpoints, and associated FIFOs, is controlled by bits [7,6] of the USB Status and Control Register (0x1F). Bit 7
controls the size of the endpoints and bit 6 controls the number of endpoints. These configuration options are detailed in Table
18-1. The “unused” FIFO areas in the following table can be used by the firmware as additional user RAM space.
Table 18-1. Memory Allocation for Endpoints
When the SIE writes data to a FIFO, the internal data bus is driven by the SIE; not the CPU. This causes a short delay in the
CPU operation. The delay is three clock cycles per byte. For example, an 8-byte data write by the SIE to the FIFO generates a
delay of 2 µs (3 cycles/byte * 83.33 ns/cycle * 8 bytes).
18.3
All USB devices are required to have a Control Endpoint 0 (EPA0) that is used to initialize and control each USB address. Endpoint
0 provides access to the device configuration information and allows generic USB status and control accesses. Endpoint 0 is
bidirectional to both receive and transmit data. The other endpoints are unidirectional, but selectable by the user as IN or OUT
endpoints.
The endpoint mode register is cleared during reset. The endpoint zero EPA0 mode register uses the format shown in Figure 18-2.
USB Device Endpoint Zero Mode
Bits[3..0] : Mode
Bit 4 : ACK
Bit 5: Endpoint 0 OUT Received
Bit 6: Endpoint 0 IN Received
Document #: 38-08001 Rev. *A
Bit #
Bit Name
Read/Write
Reset
unused
unused
Label
EPA2
EPA1
EPA0
Firmware writes this bits during the USB enumeration process to the non-zero address assigned by the USB host.
Must be set by firmware before the SIE can respond to USB traffic to the Device Address.
These sets the mode which control how the control endpoint responds to traffic.
This bit is set whenever the SIE engages in a transaction to the register’s endpoint that completes with an ACK packet.
1= Token received is an OUT token. 0= Token received is not an OUT token. This bit is set by the SIE to report the type of token
received by the corresponding device address is an OUT token. The bit must be cleared by firmware as part of the USB processing.
1= Token received is an IN token. 0= Token received is not an IN token. This bit is set by the SIE to report the type of token received
by the corresponding device address is an IN token. The bit must be cleared by firmware as part of the USB processing.
USB Device Endpoints
USB Control Endpoint Mode Register
:Device Address Enable
Address
0xD8
Start
0xE0
0xE8
0xF0
0xF8
[0,0]
Endpoint 0 SETUP
Received
R/W
7
0
Size
8
8
8
8
8
Endpoint 0 IN
unused
unused
Received
Figure 18-2. USB Device Endpoint Zero Mode Registers
Label
EPA0
EPA1
EPA2
R/W
USB Status And Control Register (0x1F) Bits [7, 6]
6
0
Address
Endpoint 0 OUT
0xC0
Start
0xA8
0xB0
0xB8
0xE0
[1,0]
Received
R/W
5
0
Size
32
32
8
8
8
ACK
R/W
4
0
Label
EPA4
EPA3
EPA2
EPA1
EPA0
Mode Bit 3
Address
Start
0xD8
0xE0
0xE8
0xF0
0xF8
R/W
[0,1]
3
0
Mode Bit 2
Size
8
8
8
8
8
R/W
2
0
Label
EPA4
EPA3
EPA0
EPA1
EPA2
Mode Bit 1
R/W
1
0
Address
CY7C64013
CY7C64113
0xC0
Start
0xB0
0xA8
0xB8
0xE0
[1,1]
ADDRESSES
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Mode Bit 0
R/W
0
0
Size
32
32
8
8
8
0x12)