AN2131QC Cypress Semiconductor Corp, AN2131QC Datasheet - Page 289

• Manufacturer Part Number: AN2131QC
• Description: IC MCU 8051 8K RAM 24MHZ 80BQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB®r

Specifications of AN2131QC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: AN213x
• Ram Size: 8K x 8
• Interface: I²C, USB
• Number Of I /o: 24
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1307

B.1.3 Instruction Timing
Instruction cycles in the 8051 core are 4 clock cycles in length, as opposed to the 12 clock
cycles per instruction cycle in the standard 8051. This translates to a 3X improvement in
execution time for most instructions.
Some instructions require a different number of instruction cycles on the 8051 core than they
do on the standard 8051. In the standard 8051, all instructions except for MUL and DIV take
one or two instruction cycles to complete. In the 8051 core, instructions can take between one
and five instruction cycles to complete.
For example, in the standard 8051, the instructions MOVX A, @DPTR and MOV direct,
direct each take 2 instruction cycles (24 clock cycles) to execute. In the 8051 core, MOVX
A, @DPTR takes two instruction cycles (8 clock cycles) and MOV direct, direct takes
three instruction cycles (12 clock cycles). Both instructions execute faster on the 8051 core
than they do on the standard 8051, but require different numbers of clock cycles.
For timing of real-time events, use the numbers of instruction cycles from Table B-1. to
calculate the timing of software loops. The bytes column indicates the number of memory
EZ-USB v1.9
JNB bit, rel
JBC bit, rel
JMP @ A+DPTR
JZ rel
JNZ rel
CJNE A, direct, rel
CJNE A, #d, rel
CJNE Rn, #d, rel
CJNE @ Ri, #d, rel
DJNZ Rn, rel
DJNZ direct, rel
NOP
There is an additional reserved opcode (A5) that performs the same function as NOP. All mnemonics
are copyrighted. Intel Corporation 1980.
Mnemonic
Jump on direct bit = 0
Jump on direct bit = 1 and clear
Jump indirect relative DPTR
Jump on accumulator = 0
Jump on accumulator /= 0
Compare A, direct JNE relative
Compare A, immediate JNE relative
Compare reg, immediate JNE relative
Compare Ind, immediate JNE relative
Decrement register, JNZ relative
Decrement direct byte, JNZ relative
No operation
Appendix B: 8051 Architectural Overview
Table B-2. 8051 Instruction Set
Description
Miscellaneous
Byte
3
3
1
2
2
3
3
3
3
2
1
3
Cycles
Instr.
4
4
3
3
3
4
4
4
4
3
1
4
B8-BF
D8-DF
B6-B7
Code
Hex
B5
B4
D5
30
10
73
60
70
00
B - 9