AN2131QC Cypress Semiconductor Corp, AN2131QC Datasheet - Page 200

• Manufacturer Part Number: AN2131QC
• Description: IC MCU 8051 8K RAM 24MHZ 80BQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB®r

Specifications of AN2131QC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: AN213x
• Ram Size: 8K x 8
• Interface: I²C, USB
• Number Of I /o: 24
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1307

The EZ-USB core uses the byte count registers to report isochronous data payload sizes
for OUT data transferred from the host to the USB core. Ten bits of byte count data allow
payload sizes up to 1,023 bytes. A byte count of zero is valid, meaning that the host sent
no isochronous data during the previous frame. The default values of these registers are
unknown.
Byte counts are valid only for OUT endpoints. The byte counts indicate the number of
bytes remaining in the endpoint’s Receive FIFO. Every time the 8051 reads a byte from
the ISODATA register, the byte count decrements by one.
To read USB OUT data, the 8051 first reads byte count registers OUTnBCL and OUTn-
BCH to determine how many bytes to transfer out of the OUT FIFO. (The 8051 can also
quickly test ISO output endpoints for zero byte counts using the ZBCOUT register.)
Then, the CPU reads that number of bytes from the ISODATA register. Separate byte
counts are maintained for each endpoint, so the CPU can read the FIFOs in a discontinu-
ous manner. For example, if EP8 indicates a byte count of 100, and EP9 indicates a byte
count of 50, the CPU could read 50 bytes from EP8, then read 10 bytes from EP9, and
resume reading EP8. At this moment the byte count for EP8 would read 50.
There are no byte count registers for the IN endpoints. The USB core automatically tracks
the number of bytes loaded by the 8051.
If the 8051 does not load an IN isochronous endpoint FIFO during a 1-ms frame, and the
host requests data from that endpoint during the next frame (IN token), the USB Core
responds according to the setting of the ISOSEND0 bit (USBPAIR.7). If ISOSEND0=1,
the core returns a zero-length data packet in response to the host IN token. If ISOS-
END=0, the core does not respond to the IN token.
It is the responsibility of the 8051 programmer to ensure that the number of bytes written
to the IN FIFO does not exceed the maximum packet size as reported during enumeration.
EZ-USB TRM v1.9
Chapter 12. EZ-USB Registers
Page 12-7