EP4CE40F29C8N Altera, EP4CE40F29C8N Datasheet - Page 417

no-image

EP4CE40F29C8N

Manufacturer Part Number
EP4CE40F29C8N
Description
IC CYCLONE IV FPGA 40K 780FBGA
Manufacturer
Altera
Series
CYCLONE® IV Er

Specifications of EP4CE40F29C8N

Number Of Logic Elements/cells
39600
Number Of Labs/clbs
2475
Total Ram Bits
1134000
Number Of I /o
532
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP4CE40F29C8N
Manufacturer:
ALTERA43
Quantity:
1 602
Part Number:
EP4CE40F29C8N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP4CE40F29C8N
Manufacturer:
ALTERA
0
Part Number:
EP4CE40F29C8N
Manufacturer:
ALTERA
0
Part Number:
EP4CE40F29C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EP4CE40F29C8N
0
Company:
Part Number:
EP4CE40F29C8N
Quantity:
2 800
Part Number:
EP4CE40F29C8N ALTERA
Manufacturer:
ALTERA
0
Chapter 3: Cyclone IV Dynamic Reconfiguration
Dynamic Reconfiguration Modes
Figure 3–11. Option 1 for Transmitter Core Clocking (Channel Reconfiguration Mode)
© December 2010 Altera Corporation
FPGA Fabric
tx_clkout[0]
Low-speed parallel clock (tx_clkout0)
High-speed serial clock generated by the MPLL
Figure 3–11
channels of a transceiver block.
Option 2: Use the Respective Channel Transmitter Core Clocks
Enable this option if you want the individual transmitter channel tx_clkout
signals to provide the write clock to their respective Transmit Phase Compensation
FIFOs.
This option is typically enabled when each transceiver channel is reconfigured to a
different functional mode using channel reconfiguration.
shows the sharing of channel 0’s tx_clkout between all four regular
Transceiver Block
RX0
RX1
RX2
RX3
TX0
TX1
TX2
TX3
Cyclone IV Device Handbook, Volume 2
MPLL
3–27

Related parts for EP4CE40F29C8N