DSPB56374AE Freescale Semiconductor, DSPB56374AE Datasheet - Page 9

• Manufacturer Part Number: DSPB56374AE
• Description: IC DSP 24BIT 150MHZ 52-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56374AE

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 150MHz
• Non-volatile Memory: ROM (84 kB)
• On-chip Ram: 54kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.25V
• Operating Temperature: -40°C ~ 110°C
• Mounting Type: Surface Mount
• Package / Case: 52-LQFP
• Product: DSPs
• Data Bus Width: 24 bit
• Processor Series: DSP563xx
• Core: 56000
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 150 MIPS
• Maximum Clock Frequency: 150 MHz
• Program Memory Type: Flash
• Program Memory Size: 24 KB
• Data Ram Size: 54 KB
• Operating Supply Voltage: 1.25 V or 3.3 V
• Maximum Operating Temperature: + 110 C
• Mounting Style: SMD/SMT
• Interface Type: SIA, SHI
• Minimum Operating Temperature: - 40 C
• Leaded Process Compatible: Yes
• Rohs Compliant: Yes
• Peak Reflow Compatible (260 C): Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.6
The SHI has five I/O signals that can be configured to allow the SHI to operate in either SPI or I
Freescale Semiconductor
Signal Name
MODD/IRQD
RESET
PH2
PH3
Serial Host Interface
disconnected
disconnected
Input, output,
Input, output,
Type
Input
Input
or
or
Table 8. Interrupt and Mode Control (continued)
during
MODD
Reset
State
Input
Input
DSP56374 Data Sheet, Rev. 4.2
Port H2—When the MODC/IRQC is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
Mode Select D/External Interrupt Request D—MODD/IRQD is an
active-low Schmitt-trigger input, internally synchronized to the DSP
clock. MODD/IRQD selects the initial chip operating mode during
hardware reset and becomes a level-sensitive or
negative-edge-triggered, maskable interrupt request input during
normal instruction processing. This pin can also be programmed as
GPIO. MODA, MODB, MODC, and MODD select one of 16 initial chip
operating modes, latched into OMR when the RESET signal is
de-asserted.
This pin has an internal pull up resistor.
This input is 5 V tolerant.
Port H3—When the MODD/IRQD is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
Reset—RESET is an active-low, Schmitt-trigger input. When asserted,
the chip is placed in the Reset state and the internal phase generator is
reset. The Schmitt-trigger input allows a slowly rising input (such as a
capacitor charging) to reset the chip reliably. When the RESET signal is
de-asserted, the initial chip operating mode is latched from the MODA,
MODB, MODC, and MODD inputs. The RESET signal must be asserted
during power up. A stable EXTAL signal must be supplied while RESET
is being asserted.
This pin has an internal pull up resistor.
This input is 5 V tolerant.
Signal Description
Signal Groupings
2
C mode.
9