DSPB56374AE Freescale Semiconductor, DSPB56374AE Datasheet - Page 4

• Manufacturer Part Number: DSPB56374AE
• Description: IC DSP 24BIT 150MHZ 52-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56374AE

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 150MHz
• Non-volatile Memory: ROM (84 kB)
• On-chip Ram: 54kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.25V
• Operating Temperature: -40°C ~ 110°C
• Mounting Type: Surface Mount
• Package / Case: 52-LQFP
• Product: DSPs
• Data Bus Width: 24 bit
• Processor Series: DSP563xx
• Core: 56000
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 150 MIPS
• Maximum Clock Frequency: 150 MHz
• Program Memory Type: Flash
• Program Memory Size: 24 KB
• Data Ram Size: 54 KB
• Operating Supply Voltage: 1.25 V or 3.3 V
• Maximum Operating Temperature: + 110 C
• Mounting Style: SMD/SMT
• Interface Type: SIA, SHI
• Minimum Operating Temperature: - 40 C
• Leaded Process Compatible: Yes
• Rohs Compliant: Yes
• Peak Reflow Compatible (260 C): Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Features
2.2
2.3
4
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Six-channel DMA controller
Provides a wide range of frequency multiplications (1 to 255), predivider factors (1 to 31), PLL
feedback multiplier (2 or 4), Output divide factor (1, 2, or 4) and a power-saving clock divider
(2
Internal address tracing support and OnCE for Hardware/Software debugging
JTAG port, supporting boundary scan, compliant to IEEE 1149.1
Very low-power CMOS design, fully static design with operating frequencies down to DC
STOP and WAIT low-power standby modes
6Kx24 Bit Y-Data RAM and 4Kx24 Bit Y-Data ROM
6Kx24 Bit X-Data RAM and 4Kx24 Bit X-Data ROM
20Kx24 Bit Program and Bootstrap ROM including a PROM patching mechanism
6Kx24 Bit Program RAM.
Various memory switches are available. See memory table below.
Enhanced Serial Audio Interface (ESAI): up to 4 receiver pins and up to 6 transmitter pins, master
or slave. I
Enhanced Serial Audio Interface I (ESAI_1): up to 4 receiver pins and up to 6 transmitter pins,
master or slave. I
the 80-pin package only.
Serial Host Interface (SHI): SPI and I
24-bit words. Three noise reduction filter modes.
Triple Timer module (TEC)
Most pins of unused peripherals may be programmed as GPIO pins. Up to 47 pins can be
configured as GPIO on the 80 pin package and 20 pins on the 52 pin package.
i
On-chip Memory Configuration
Peripheral Modules
: i = 0 to 7) to reduce clock noise
MSW1
X
0
0
1
1
2
Bit Settings
S, Sony, AC97, network, and other programmable protocols.
MSW0
X
0
1
0
1
2
S, Sony, AC97, network and other programmable protocols. Note: Available in
Table 1. DSP56374 Memory Switch Configurations
MS
0
1
1
1
1
DSP56374 Data Sheet, Rev. 4.2
Prog
RAM
10K
6K
2K
4K
8K
2
C protocols, 10-word receive FIFO, support for 8, 16, and
X Data
RAM
10K
6K
8K
4K
4K
Memory Sizes (24-bit words)
Y Data
RAM
6K
6K
6K
6K
4K
ROM
Prog
20K
20K
20K
20K
20K
X Data
ROM
4K
4K
4K
4K
4K
Freescale Semiconductor
Y Data
ROM
4K
4K
4K
4K
4K