MT9HVF6472PY-667F1 Micron Technology Inc, MT9HVF6472PY-667F1 Datasheet - Page 13

• Manufacturer Part Number: MT9HVF6472PY-667F1
• Manufacturer: Micron Technology Inc

Specifications of MT9HVF6472PY-667F1

• Main Category: DRAM Module
• Sub-category: DDR2 SDRAM
• Module Type: 240RDIMM
• Device Core Size: 72b
• Organization: 64Mx72
• Total Density: 512MByte
• Chip Density: 512Mb
• Access Time (max): 45ps
• Maximum Clock Rate: 667MHz
• Operating Supply Voltage (typ): 1.8V
• Operating Current: 1.62A
• Number Of Elements: 9
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 90C
• Operating Temperature Classification: Commercial
• Pin Count: 240
• Mounting: Socket
• Lead Free Status / Rohs Status: Compliant

Register and PLL Specifications
Table 14:
PDF: 09005aef81de9391/Source: 09005aef81de9385
HVF9C32_64_128x72.fm - Rev. D 06/08 EN
Parameter
DC high-level
input voltage
DC low-level
input voltage
AC high-level
input voltage
AC low-level
input voltage
Output high voltage
Output low voltage
Input current
Static standby
Static operating
Dynamic operating
(clock tree)
Dynamic operating
(per each input)
Input capacitance
(per device, per pin)
Input capacitance
(per device, per pin)
Register Specifications
SSTU32866 devices or equivalent
Notes:
Symbol
V
V
V
V
I
I
IH
IH
V
IL
IL
V
1. Timing and switching specifications for the register listed above are critical for proper oper-
I
I
DDD
DDD
DD
DD
C
C
OH
(
(
OL
I
(
(
I
DC
AC
DC
AC
I
I
ation of the DDR2 SDRAM RDIMMs. These are meant to be a subset of the parameters for
the specific device used on the module. Detailed information for this register is available in
JEDEC standard JESD82.
)
)
)
)
256MB, 512MB, 1GB (x72, SR): 240-Pin DDR2 SDRAM VLP RDIMM
except RESET#
Parity output
Parity output
command,
command,
command,
command,
All inputs
Control,
Control,
Control,
Control,
address
address
address
address
All pins
All pins
All pins
RESET#
Pins
n/a
n/a
RESET# = V
RESET# = V
One data input switching at
V
V
switching 50% duty cycle;
switching 50% duty cycle
IL
IL
RESET# = V
t
V
(
(
CK/2, 50% duty cycle
AC
AC
V
I
V
V
= V
I
I
RESET# = V
I
), I
), I
= V
= V
= V
13
V
Condition
IH
O
O
DD
LVCMOS
LVCMOS
SSTL_18
SSTL_18
SSTL_18
SSTL_18
DD
DD
DD
REF
DD
(
I
= 0; CK and CK#
= 0; CK and CK#
AC
Q = 1.8V
O
, V
, V
Q or V
Q or V
= 0
SS
) or V
±250mV;
I
I
Q (I
= V
= V
SS
Micron Technology, Inc., reserves the right to change products or specifications without notice.
O
Q;
IL
SS
IH
IH
SS
(
= 0)
Q
(
(
Q
DC
AC
AC
)
) or
) or
Register and PLL Specifications
V
V
REF
REF
(
(
Min
DC
DC
1.2
2.5
–5
0
0
–
–
–
–
–
–
) + 125
) + 250
©2006 Micron Technology, Inc. All rights reserved.
manufacturer
manufacturer
manufacturer
V
V
V
REF
REF
DD
Varies by
Varies by
Varies by
(
(
Max
Q + 250
V
DC
DC
100
0.5
3.5
+5
40
DD
–
) - 125
) - 250
Units
mV
mV
mV
mV
mA
µA
µA
µA
µA
pF
pF
V
V