MT9HTF6472PKY-40EB1 Micron Technology Inc, MT9HTF6472PKY-40EB1 Datasheet - Page 13

• Manufacturer Part Number: MT9HTF6472PKY-40EB1
• Manufacturer: Micron Technology Inc

Specifications of MT9HTF6472PKY-40EB1

• Main Category: DRAM Module
• Sub-category: DDR2 SDRAM
• Module Type: 244RDIMM
• Device Core Size: 72b
• Organization: 64Mx72
• Total Density: 512MByte
• Chip Density: 512Mb
• Maximum Clock Rate: 400MHz
• Operating Supply Voltage (typ): 1.8V
• Operating Current: 1.035A
• Number Of Elements: 9
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 244
• Mounting: Socket
• Lead Free Status / Rohs Status: Compliant

Table 12:
Table 13:
PDF: 09005aef817ab1fc/Source: 09005aef817ab1dd
HTF9C64_128x72K.fm - Rev. D 7/08 EN
Parameter
Parameter
DC high-level input
voltage
DC low-level input
voltage
Input voltage (limits)
DC high-level input
voltage
DC low-level input
voltage
Input differential-pair
cross voltage
Input differential
voltage
Input differential
voltage
Input current
Output disabled
current
Static supply current
Dynamic supply
Input capacitance
Stabilization time
Input clock slew rate
SSC modulation frequency
SSC clock input frequency deviation
PLL loop bandwidth (–3dB from unity gain)
PLL Specifications
CU877 device or equivalent JESD82-8.01
PLL Clock Driver Timing Requirements and Switching Characteristics
Notes:
Symbol
V
V
I
ID
ID
I
DDLD
1. PLL timing and switching specifications are critical for proper operation of the DDR2 DIMM.
V
V
V
V
I
C
V
V
ODL
DD
I
(
(
IH
IN
IH
IX
IN
IL
IL
I
DC
AC
This is a subset of parameters for the specific PLL used. Detailed PLL information is available
in JEDEC standard JESD82.
)
)
RESET#, CK,
Each input
CK, CK#
CK, CK#
CK, CK#
CK, CK#
CK, CK#
CK, CK#
RESET#
RESET#
RESET#
512MB, 1GB: (x72, SR) 244-Pin DDR2 Registered MiniDIMM
Pins
CK#
n/a
RESET# = V
(not connected to PCB)
CK, CK# = 270 MHz, all
V
V
V
Differential input
Differential input
Differential input
Differential input
Differential input
CK = CK# = LOW
I
I
I
outputs open
= V
= V
= V
13
Condition
or V
LVCMOS
LVCMOS
DD
DD
DD
SS
Q or V
Q or V
Q or V
Q; V
IL
–
(
DC
I
)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Symbol
= V
SS
SS
SS
slr(i)
Q
Q
Q
t
–
–
–
IH
L
(
AC
)
Register and PLL Specifications
(V
0.65 × V
0.65 × V
DD
Q/2) - 0.15 (V
–250
Min
–0.3
Min
100
–10
0.3
0.6
1.0
0.0
2.0
30
–
–
–
–
2
–
DD
DD
©2005 Micron Technology, Inc. All rights reserved.
DD
V
V
V
0.35 × V
0.35 × V
DD
DD
DD
Max
–0.5
Q/2) + 0.15
4.0
15
33
Max
+250
+10
–
500
300
Q + 0.3
Q + 0.4
Q + 0.4
3
–
–
–
DD
DD
Units
MHz
V/ns
kHz
Units
µs
%
mA
µA
µA
µA
µA
pF
V
V
V
V
V
V
V
V