MT9HTF6472PKY-40EB1 Micron Technology Inc, MT9HTF6472PKY-40EB1 Datasheet

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MT9HTF6472PKY-40EB1

Manufacturer Part Number
MT9HTF6472PKY-40EB1
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT9HTF6472PKY-40EB1

Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
244RDIMM
Device Core Size
72b
Organization
64Mx72
Total Density
512MByte
Chip Density
512Mb
Maximum Clock Rate
400MHz
Operating Supply Voltage (typ)
1.8V
Operating Current
1.035A
Number Of Elements
9
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
244
Mounting
Socket
Lead Free Status / Rohs Status
Compliant
DDR2 SDRAM Registered MiniDIMM
MT9HTF6472(P)K – 512MB
MT9HTF12872(P)K – 1GB
For component specifications, refer to Micron’s Web site: www.micron.com/products/dram/ddr2
Features
• 244-pin, mini dual in-line memory module
• Fast data transfer rates: PC2-3200, PC2-4200, or
• Supports ECC error detection and correction
• 512MB (64 Meg x 72), 1GB (128 Meg x 72)
• V
• V
• JEDEC standard 1.8V I/O (SSTL_18 compatible)
• Differential data strobe (DQS, DQS#) option
• Four-bit prefetch architecture
• DLL to align DQ and DQS transitions with CK
• Multiple internal device banks for concurrent
• Supports duplicate output strobe (RDQS/RDQS#)
• Programmable CAS# latency (CL)
• Posted CAS# additive latency (AL)
• WRITE latency = READ latency - 1
• Programmable burst lengths: 4 or 8
• Adjustable data-output drive strength
• 64ms, 8,192-cycle refresh
• On-die termination (ODT)
• Serial presence-detect (SPD) with EEPROM
• Gold edge contacts
• Single rank
Table 1:
PDF: 09005aef817ab1fc/Source: 09005aef817ab1dd
HTF9C64_128x72K.fm - Rev. D 7/08 EN
Refresh count
Row addressing
Device bank addressing
Device configuration
Column addressing
Module rank addressing
(MiniDIMM)
PC2-5300
operation
DD
DDSPD
= V
DD
= +1.7V to +3.6V
Q = +1.8V
Address Table
Products and specifications discussed herein are subject to change by Micron without notice.
t
CK
512MB, 1GB: (x72, SR) 244-Pin DDR2 Registered MiniDIMM
512Mb (64 Meg x 8)
1
16K A[13:0]
4 BA[1:0]
1K A[9:0]
512MB
1 (S0#)
Figure 1:
Notes: 1. CL = CAS (READ) latency; registered mode
PCB Height: 30 mm (1.18 in)
Options
• Parity
• Package
• Frequency/CAS latency
• PCB height
8K
244-pin DIMM (lead-free)
2.5ns @ CL = 5 (DDR2-800)
2.5ns @ CL = 6 (DDR2-800)
3ns @ CL = 5 (DDR2-667)
3.75ns @ CL = 4 (DDR2-533)
5.0ns @ CL = 3 (DDR2-400)
30mm (1.18in)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2. Not recommended for future designs.
will add one clock cycle to CL.
244-Pin DIMM (MO-244 R/C “A”)
1
©2005 Micron Technology, Inc. All rights reserved.
2
1Gb (128Meg x 8)
16K A[13:0]
1K A[9:0]
8 BA[2:0]
1 (S0#)
1GB
8K
Marking
Features
-80E
-53E
-40E
-800
-667
P
Y

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MT9HTF6472PKY-40EB1 Summary of contents

Page 1

... DDR2 SDRAM Registered MiniDIMM MT9HTF6472(P)K – 512MB MT9HTF12872(P)K – 1GB For component specifications, refer to Micron’s Web site: www.micron.com/products/dram/ddr2 Features • 244-pin, mini dual in-line memory module (MiniDIMM) • Fast data transfer rates: PC2-3200, PC2-4200, or PC2-5300 • Supports ECC error detection and correction • ...

Page 2

... Meg x 72 6.4 GB/s 64 Meg x 72 5.3 GB/s 64 Meg x 72 4.3 GB/s 64 Meg x 72 3.2 GB 1Gb DDR2 SDRAM Module Configuration Bandwidth 128 Meg x 72 6.4 GB/s 128 Meg x 72 6.4 GB/s 128 Meg x 72 5.3 GB/s 128 Meg x 72 4.3 GB/s 128 Meg ...

Page 3

Pin Assignments and Descriptions Table 5: Pin Assignments 244-Pin MiniDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol REF DQ24 DQ0 34 DQ25 65 4 DQ1 35 ...

Page 4

... LOAD MODE command. Output with read data. Edge-aligned with read data. Input with write data. Center-aligned with write data. SDA I/O Serial data: SDA is a bidirectional pin used to transfer addresses and data into and out of the SPD EEPROM on the module on the Output Parity error output: Parity error found on the command and address bus. ...

Page 5

... DDSPD V Supply Reference voltage: V REF V Supply Ground – No connect: These pins are not connected on the module. RFU – Reserved for future use. PDF: 09005aef817ab1fc/Source: 09005aef817ab1dd HTF9C64_128x72K.fm - Rev. D 7/08 EN 512MB, 1GB: (x72, SR) 244-Pin DDR2 Registered MiniDIMM Pin Assignments and Descriptions Description /2. DD Micron Technology, Inc ...

Page 6

Functional Block Diagram Figure 2: Functional Block Diagram RS0# BA[2:0] A[15:0] PAR_IN RESET# PDF: 09005aef817ab1fc/Source: 09005aef817ab1dd HTF9C64_128x72K.fm - Rev. D 7/08 EN 512MB, 1GB: (x72, SR) 244-Pin DDR2 Registered MiniDIMM DQS0 DQS0# DM0/DQS9 NC/DQS9# DM/ NU/ CS# DQS DQS# RDQS ...

Page 7

... The double data rate architecture is essentially a 4n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for the DDR2 SDRAM module effectively consists of a single 4n-bit- wide, one-clock-cycle data transfer at the internal DRAM core and four corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins ...

Page 8

... Electrical Specifications Stresses greater than those listed in Table 7, may cause permanent damage to the module. This is a stress rating only, and functional operation of the module at these or any other conditions outside those indicated in each device’s data sheet is not implied. Exposure to absolute maximum rating conditions for extended periods may adversely affect reliability ...

Page 9

... Micron encourages designers to simulate the signal characteristics of the system’s memory bus to ensure adequate signal integrity of the entire memory system. Power Operating voltages are specified at the DRAM, not at the edge connector of the module. Designers must account for any system voltage drops at anticipated power levels to ensure the required supply voltage is maintained. ...

Page 10

Table 9: I Specifications and Conditions – 512MB DD Values are for the MT47H64M8 DDR2 SDRAM components only, and are computed from values specified in the 512Mb (64 Meg x 8) component data sheet Parameter/Condition Operating one bank active-precharge current; ...

Page 11

Table 10: I Specifications and Conditions – 1GB DD Values are for the MT47H128M8 DDR2 SDRAM components only, and are computed from values specified in the 1Gb (128Meg x 8) component data sheet Parameter/Condition Operating one bank active-precharge current; t ...

Page 12

... Timing and switching specifications for the register listed above are critical for proper oper- ation of the DDR2 SDRAM RDIMMs. These are meant subset of the parameters for the specific device used on the module. Detailed information for this register is available in JEDEC standard JESD82. ...

Page 13

Table 12: PLL Specifications CU877 device or equivalent JESD82-8.01 Parameter Symbol DC high-level input V IH voltage DC low-level input V IL voltage V Input voltage (limits high-level input V IH voltage V DC low-level input IL voltage ...

Page 14

Serial Presence-Detect Table 14: Serial Presence-Detect EEPROM DC Operating Conditions Parameter/Condition Supply voltage Input high voltage: Logic 1; All inputs Input low voltage: Logic 0; All inputs Output low voltage 3mA OUT Input leakage current GND ...

Page 15

... Module Dimensions Figure 3: 244-pin DIMM DDR2 Module Dimensions 2.0 (0.079 1.0 (0.039 1.80 (0.071 6.0 (0.236) TYP 1.0 (0.039) 0.60 (0.024) TYP Pin 1 TYP 2.0 (0.079) TYP 42.9 (1.689) TYP U7 U8 3.3 (0.130) TYP Pin 244 33.6 (1.323) TYP 3.2 (0.126) ...

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