ADC083000CIYB/NOPB National Semiconductor, ADC083000CIYB/NOPB Datasheet - Page 14

• Manufacturer Part Number: ADC083000CIYB/NOPB
• Description: IC ADC 8BIT 3GSPS LP 128-LQFP
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of ADC083000CIYB/NOPB

• Number Of Bits: 8
• Sampling Rate (per Second): 3G
• Data Interface: Serial
• Number Of Converters: 2
• Power Dissipation (max): 2.3W
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-LQFP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *ADC083000CIYB; *ADC083000CIYB/NOPB; ADC083000CIYB

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frequencies being applied to the ADC input at the same time.
It is defined as the ratio of the power in the second and third
order intermodulation products to the power in one of the
original frequencies. IMD is usually expressed in dBFS.
LSB (LEAST SIGNIFICANT BIT) is the bit that has the small-
est value or weight of all bits. This value is
where V
by the FSR input (pin-14) and "n" is the ADC resolution in bits,
which is 8 for the ADC083000.
LVDS DIFFERENTIAL OUTPUT VOLTAGE (V
solute value of the difference between the V
each measured with respect to Ground.
LVDS OUTPUT OFFSET VOLTAGE (V
between the D+ and D- pins output voltage; i.e., [(V
( V
MISSING CODES are those output codes that are skipped
and will never appear at the ADC outputs. These codes can-
not be reached with any input value.
MSB (MOST SIGNIFICANT BIT) is the bit that has the largest
value or weight. Its value is one half of full scale.
NEGATIVE FULL-SCALE ERROR (NFSE) is a measure of
how far the first code transition is from the ideal 1/2 LSB above
a differential -V
age is assumed to be ideal, so this error is a combination of
full-scale error and reference voltage error.
OFFSET ERROR (V
scale point is from the ideal zero voltage differential input.
ples to result in an average code of 128.
OUTPUT DELAY (t
input clock transition, CLK, to the 50% point of the updated
data transition at the output pins.
OVER-RANGE RECOVERY TIME is the time required after
the differential input voltages goes from ±1.2V to 0V for the
converter to recover and make a conversion with its rated ac-
curacy.
PIPELINE DELAY (LATENCY) is the number of input clock
cycles between initiation of conversion and when that data is
presented to the output driver stage. New data is available at
D
-)]/2.
Offset Error = Actual Input causing average of 8k sam-
FS
is the differential full-scale amplitude of V
IN
/ 2. For the ADC083000 the reference volt-
OD
OFF
) is the time delay from 50% point of the
) is a measure of how far the mid-
FIGURE 1.
V
FS
/ 2
n
OS
D
) is the midpoint
+ & V
20193246
OD
) is the ab-
D
- outputs;
IN
as set
D
+) +
14
every clock cycle, but the data lags the conversion by the
Pipeline Delay plus the t
POSITIVE FULL-SCALE ERROR (PFSE) is a measure of
how far the last code transition is from the ideal 1-1/2 LSB
below a differential +V
voltage is assumed to be ideal, so this error is a combination
of full-scale error and reference voltage error.
POWER SUPPLY REJECTION RATIO (PSRR) can be one
of two specifications. PSRR1 (DC PSRR) is the ratio of the
change in full-scale error that results from a power supply
voltage change from 1.8V to 2.0V. PSRR2 (AC PSRR) is a
measure of how well an a.c. signal riding upon the power
supply is rejected from the output and is measured with a 248
MHz, 100 mV
ratio of the output amplitude of that signal at the output to its
amplitude on the power supply pin. PSRR is expressed in dB.
SIGNAL TO NOISE RATIO (SNR) is the ratio, expressed in
dB, of the rms value of the input signal at the output to the rms
value of the sum of all other spectral components below one-
half the sampling frequency, not including harmonics or d.c.
SIGNAL TO NOISE PLUS DISTORTION (S/(N+D) or
SINAD) is the ratio, expressed in dB, of the rms value of the
input signal at the output to the rms value of all of the other
spectral components below half the input clock frequency, in-
cluding harmonics but excluding d.c.
SPURIOUS-FREE DYNAMIC RANGE (SFDR) is the differ-
ence, expressed in dB, between the rms values of the input
signal at the output and the peak spurious signal, where a
spurious signal is any signal present in the output spectrum
that is not present at the input, excluding d.c.
TOTAL HARMONIC DISTORTION (THD) is the ratio ex-
pressed in dB, of the rms total of the first nine harmonic levels
at the output to the level of the fundamental at the output. THD
is calculated as
where A
quency and A
harmonic frequencies in the output spectrum.
– Second Harmonic Distortion (2nd Harm) is the differ-
ence, expressed in dB, between the RMS power in the input
frequency seen at the output and the power in its 2nd har-
monic level at the output.
– Third Harmonic Distortion (3rd Harm) is the difference
expressed in dB between the RMS power in the input fre-
quency seen at the output and the power in its 3rd harmonic
level at the output.
WORD ERROR RATE is the probability of error and is defined
as the probable number of errors per unit of time divided by
the number of words seen in that amount of time. A Word
Error Rate of 10
conversion about every four (4) years.
f1
is the RMS power of the fundamental (output) fre-
P-P
f2
through A
-18
signal riding upon the power supply. It is the
corresponds to a statistical error in one
IN
/ 2. For the ADC083000 the reference
OD
f10
.
are the RMS power of the first 9