AD7192BRUZ Analog Devices Inc, AD7192BRUZ Datasheet - Page 4

• Manufacturer Part Number: AD7192BRUZ
• Description: IC ADC 24BIT 2CH W/PGA 24-TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD7192BRUZ

• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Design Resources: Precision Weigh Scale Design Using AD7192 with Internal PGA (CN0119)
• Number Of Bits: 24
• Sampling Rate (per Second): 4.8k
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP (0.173", 4.40mm Width)
• Resolution (bits): 24bit
• Input Channel Type: Pseudo Differential
• Supply Voltage Range - Analogue: 3V To 5.25V
• Supply Voltage Range - Digital: 2.7V To 5.25V
• Supply: RoHS Compliant
• Sampling Rate: 4.8kSPS
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD7192
Parameter
ANALOG INPUTS
REFERENCE INPUT
Differential Input Voltage Ranges
Absolute AIN Voltage Limits
Analog Input Current
REFIN Voltage
Absolute REFIN Voltage Limits
Average Reference Input Current
Sinc
Unbuffered Mode
Buffered Mode
Buffered Mode
Unbuffered Mode
External Clock
Internal Clock
External Clock
Input Current
Input Current Drift
Input Current
Input Current Drift
3
@ 50 Hz, 60 Hz
@ 50 Hz
@ 60 Hz
@ 50 Hz, 60 Hz
@ 50 Hz
@ 60 Hz
@ 50 Hz, 60 Hz
@ 50 Hz
@ 60 Hz
Filter
2
2
2
±5
±0.05
AD7192B
120
82
120
120
75
60
70
70
100
67
95
95
± V
± (AV
AGND − 50 mV
AV
AGND + 250 mV
AV
±2
±3
±3.5
±1
±1.6
AV
1
AV
GND – 50 mV
AV
4.5
DD
DD
DD
DD
DD
REF
− 250 mV
+ 50 mV
+ 50 mV
DD
/gain
– 1.25 V)/gain
Rev. A | Page 4 of 40
Unit
dB min
dB min
dB min
dB min
dB min
dB min
dB min
dB min
dB min
dB min
dB min
dB min
V nom
V min/max
V min
V max
V min
V max
nA max
nA max
pA/°C typ
μA/V typ
μA/V typ
nA/V/°C typ
nA/V/°C typ
V nom
V min
V max
V min
V max
μA/V typ
Test Conditions/Comments
10 Hz output data rate, 50 ± 1 Hz, 60 ± 1 Hz.
50 Hz output data rate, REJ60
50 ± 1 Hz, 60 ± 1 Hz.
50 Hz output data rate, 50 ± 1 Hz.
60 Hz output data rate, 60 ± 1 Hz.
10 Hz output data rate, 50 ± 1 Hz, 60 ± 1 Hz.
50 Hz output data rate, REJ60
50 ± 1 Hz, 60 ± 1 Hz.
50 Hz output data rate, 50 ± 1 Hz.
60 Hz output data rate, 60 ± 1 Hz.
10 Hz output data rate, 50 ± 1 Hz, 60 ± 1 Hz.
50 Hz output data rate, REJ60
50 ± 1 Hz, 60 ± 1 Hz.
50 Hz output data rate, 50 ± 1 Hz.
60 Hz output data rate, 60 ± 1 Hz.
VREF = REFINx(+) − REFINx(−),
gain = 1 to 128.
Gain > 1.
Gain = 1.
Gain > 1.
Gain = 1, input current varies with input
voltage.
Gain > 1.
External clock.
Internal clock.
REFIN = REFINx(+) − REFINx(−).
The differential input must be limited to
±(AV
DD
– 1.25 V)/gain when gain > 1.
1
6
6
6
= 1,
= 1,
= 1,