AD7192BRUZ Analog Devices Inc, AD7192BRUZ Datasheet - Page 11

IC ADC 24BIT 2CH W/PGA 24-TSSOP

AD7192BRUZ

Manufacturer Part Number
AD7192BRUZ
Description
IC ADC 24BIT 2CH W/PGA 24-TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7192BRUZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Design Resources
Precision Weigh Scale Design Using AD7192 with Internal PGA (CN0119)
Number Of Bits
24
Sampling Rate (per Second)
4.8k
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP (0.173", 4.40mm Width)
Resolution (bits)
24bit
Input Channel Type
Pseudo Differential
Supply Voltage Range - Analogue
3V To 5.25V
Supply Voltage Range - Digital
2.7V To 5.25V
Supply
RoHS Compliant
Sampling Rate
4.8kSPS
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Pin No.
13
14
15
16
17
18
19
20
21
22
23
24
Mnemonic
AIN3
AIN4
REFIN1(+)
REFIN1(−)
BPDSW
AGND
DGND
AV
DV
SYNC
DOUT/RDY
DIN
DD
DD
Description
Analog Input. This pin can be configured as the positive input of a fully differential input pair when used with
AIN4 or as a pseudodifferential input when used with AINCOM.
Analog Input. This pin can be configured as the negative input of a fully differential input pair when used
with AIN3 or as a pseudodifferential input when used with AINCOM.
Positive Reference Input. An external reference can be applied between REFIN1(+) and REFIN1(−). REFIN1(+)
can lie anywhere between AV
AV
Negative Reference Input. This reference input can lie anywhere between AGND and AV
Bridge Power-Down Switch to AGND.
Analog Ground Reference Point.
Digital Ground Reference Point.
Analog Supply Voltage, 3 V to 5.25 V. AV
AV
Digital Supply Voltage, 2.7 V to 5.25 V. DV
with DV
Logic input that allows for synchronization of the digital filters and analog modulators when using a number
of AD7192 devices. While SYNC is low, the nodes of the digital filter, the filter control logic, and the
calibration control logic are reset, and the analog modulator is also held in its reset state. SYNC does not
affect the digital interface but does reset RDY to a high state if it is low. SYNC has a pull-up resistor internally
to DV
Serial Data Output/Data Ready Output. DOUT/RDYserves a dual purpose. It functions as a serial data output
pin to access the output shift register of the ADC. The output shift register can contain data from any of the
on-chip data or control registers. In addition, DOUT/RDY operates as a data ready pin, going low to indicate
the completion of a conversion. If the data is not read after the conversion, the pin goes high before the next
update occurs. The DOUT/RDY falling edge can be used as an interrupt to a processor, indicating that valid
data is available. With an external serial clock, the data can be read using the DOUT/RDY pin. With CS low, the
data-/control-word information is placed on the DOUT/RDY pin on the SCLK falling edge and is valid on the
SCLK rising edge.
Serial Data Input to the Input Shift Register on the ADC. Data in this shift register is transferred to the control
registers in the ADC, with the register selection bits of the communications register identifying the
appropriate register.
DD
DD
, but the part functions with a reference from 1 V to AV
at 5 V or vice versa.
DD
.
DD
at 5 V or vice versa.
DD
Rev. A | Page 11 of 40
and AGND + 1 V. The nominal reference voltage, (REFIN1(+) − REFIN1(−)), is
DD
DD
is independent of DV
is independent of AV
DD
.
DD
DD
. Therefore, DV
. Therefore, AV
DD
DD
can be operated at 3 V with
can be operated at 3 V
DD
− 1 V.
AD7192

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