MC13892JVLR2 Freescale, MC13892JVLR2 Datasheet - Page 70

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MC13892JVLR2

Manufacturer Part Number
MC13892JVLR2
Description
Manufacturer
Freescale
Datasheet

Specifications of MC13892JVLR2

Operating Temperature (max)
85C
Operating Temperature (min)
-30C
Mounting
Surface Mount
Package Type
BGA
Case Length
12mm
Screening Level
Commercial
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC13892JVLR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
FUNCTIONAL DEVICE OPERATION
OPERATING MODES
by SPI enable bits PWGTxSPIEN, according to
GENERAL PURPOSE OUTPUTS
use cases for GPO outputs include battery pack thermistor biasing and enabling of peripheral devices, such as light sensor(s),
camera flash, or even supplemental regulators.
characteristics.
resistance of the GPO1 driver is of importance; see
As an application example, for a dual light sensor application, Channel 7 can be toggled between the ADIN7 (ADINSEL7 = 00)
and GPO4 (ADINSEL7 = 11) for convenient connectivity and monitoring of two sensors. The GPO4 pin is configured for ADC
input mode by default (GPO4ADIN = 1) so that the GPO driver stage is high-impedance at power up. The GPO4 pin can be
configured by software for GPO operation with GPO4ADIN = 0. Refer to
70
13892
When SPI controlled (Watchdog, On, and User Off Wait states), the PWGTDRVx power gate drive pin states are determined
GPO drivers included can provide useful system level signaling with SPI enabling and programmable Standby control. Key
SPI enabling can be used for coordinating GPOs with ADC conversions for consumption efficiency and desired settling
Four general purpose outputs are provided, summarized in
The GPO1 output is intended to be used for battery thermistor biasing. For accurate thermistor reading by the ADC, the output
Finally, a muxing option is included to allow GPO4 to be configured for a muxed connection into Channel 7 of the GP ADC.
Table 42. GPO1 Driver Output Characteristics
GPO1 Output Impedance
Parameter
Table 41. GPO Control Scheme
Table 39. Power Gating Logic Table
Notes
Notes
57.
56.
GPOxEN
Table 40. GPO Control Bits
GPOxEN
GPOxSTBY
x = 1, 2, 3, or 4
0
1
1
1
GPO1 is automatically made active high when a charger is
detected, see
information.
PWGTxSPIEN
Applicable for Watchdog, On and User Off Wait modes
only. If PWGT1SPIEN AND PWGT2SPIEN both = 1 then
the charge pump is disabled.
Output VCORE Impedance to VCORE
SPI Bit
Table
1
0
GPOxSTBY
ADC
Battery Interface and Control
39.
X
0
1
1
Condition
Subsystem.
GPOx enable
GPOx controlled by STANDBY
Table 40
STANDBY
GPO Control
X
X
0
1
PWGTDRVx
and
ADC Subsystem
High
Low
Table 41
Output GPOx
for more
200
Min
High
High
Low
Low
(active high polarities assumed).
Analog Integrated Circuit Device Data
for GP ADC details.
Typ
500
Max
Freescale Semiconductor
Ohm
Units

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