MC13892JVLR2 Freescale, MC13892JVLR2 Datasheet - Page 55

• Manufacturer Part Number: MC13892JVLR2
• Manufacturer: Freescale

Specifications of MC13892JVLR2

• Operating Temperature (max): 85C
• Operating Temperature (min): -30C
• Mounting: Surface Mount
• Package Type: BGA
• Case Length: 12mm
• Screening Level: Commercial
• Lead Free Status / RoHS Status: Compliant

INTERFACE
uses on chip signals and detector outputs.
Analog Integrated Circuit Device Data
Freescale Semiconductor
Table 22. Power Control System Interface Signals
PWRON1
PWRON2
PWRON3
PWRONxI/M/S
PWRON1DBNC[1:0]
PWRON2DBNC[1:0]
PWRON3DBNC[1:0]
PWRON1RSTEN
PWRON2RSTEN
PWRON3RSTEN
RESTARTEN
SYSRSTI/M
WDI
WDIRESET
WDIRESETI/M
RESET
RESETMCU
PUMS1
PUMS2
STANDBY
STANDBYINV
STANDBYSEC
STANDBYSECINV
STBYDLY[1:0]
BPON
BPONI/M/S
LOBATH
LOBATHI/M/S
LOBATL
LOBATLI/M/S
BPSNS [1:0]
UVDET
LICELL
CLK32KMCU
CLK32K
CLK32KMCUEN
DRM
PCEN
PCI/M
PCT[7:0]
PCCOUNTEN
PCCOUNT[3:0]
PCMAXCNT[3:0]
PCUTEXPB
The power control system on the MC13892 interfaces with the processor via different IO signals and the SPI/I2C bus. It also
Name
Type of Signal
Output pin
Output pin
Output pin
Output pin
Threshold
Threshold
Threshold
Threshold
Input pin
Input pin
Input pin
Input pin
Input pin
Input pin
Input pin
Input pin
Input pin
SPI bits
SPI bits
SPI bits
SPI bits
SPI bits
SPI bits
SPI bits
SPI bits
SPI bits
SPI bits
SPI bits
SPI bits
SPI bits
SPI bits
SPI bits
SPI bit
SPI bit
SPI bit
SPI bit
SPI bit
SPI bit
SPI bit
SPI bit
SPI bit
SPI bit
SPI bit
SPI bit
Power on/off 1 button connection
Power on/off 2 button connection
Power on/off 3 button connection
PWRONx pin interrupt /mask / sense bits
Sets time for the PWRON1 pin hardware debounce
Sets time for the PWRON2 pin hardware debounce
Sets time for the PWRON3 pin hardware debounce
Allows for system reset through the PWRON1 pin
Allows for system reset through the PWRON2 pin
Allows for system reset through the PWRON3 pin
Allows for system restart after a PWRON initiated system reset
PWRONx System restart interrupt / mask bits
Watchdog input has to be kept high by the processor to keep the MC13892 active
Allows for system restart through the WDI pin
WDI System restart interrupt / mask bits
Reset Bar output (active low) to the application. Requires an external pull-up
Reset Bar output (active low) to the processor core. Requires an external pull-up
Switchers and regulators power up sequence and defaults selection 1
Switchers and regulators power up sequence and defaults selection 2
Signal from primary processor to put the MC13892 in a low power mode
Standby signal polarity setting
Signal from secondary processor to put the MC13892 in a low power mode
Secondary standby signal polarity setting
Sets delay before entering standby mode
Threshold validating turn on events
BP turn on threshold interrupt / mask / sense bits
Threshold for a low battery warning
Low battery warning interrupt / mask / sense bits
Threshold for a low battery detect
Low battery detect interrupt / mask / sense bits
Selects for different settings of LOBATL and LOBATH thresholds
Threshold for under-voltage detection, will shut down the device
Connection for Lithium based coin cell
Low frequency system clock output for the processor 32.768 kHz
Low frequency system clock output for application (peripherals) 32.768 kHz
Enables the CLK32KMCU clock output
Keeps VSRTC and CLK32KMCU active in all states for digital rights management, including off
mode
Enables power cut support
Power cut detect interrupt / mask bits
Allowed power cut duration
Enables power cut counter
Power cut counter
Maximum number of allowed power cuts
Indicates a power cut timer counter expired
Table 22
POWER CONTROL SYSTEM
gives a listing of the principal elements of this interface.
Function
FUNCTIONAL DEVICE OPERATION
POWER CONTROL SYSTEM
13892
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